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1.
公开(公告)号:US09412610B2
公开(公告)日:2016-08-09
申请号:US14637420
申请日:2015-03-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seung-Hoon Park , Deog-Ja Koo , Gyung-Jin Min
IPC: H01L21/3065 , H01L21/768 , H01L23/48
CPC classification number: H01L21/30655 , H01L21/76871 , H01L21/76879 , H01L21/76898 , H01L23/481 , H01L2224/16145
Abstract: A method of manufacturing a semiconductor device is disclosed. In the method, a substrate having a first surface and a second surface is provided. The second surface is opposed to the first surface. A via hole is formed to penetrate the substrate from the first surface toward the second surface. The via hole includes a first portion and a second portion. The first portion has a first sidewall which is substantially perpendicular to the first surface. The second portion has a second sidewall which gradually decreases from the first surface toward the second surface, and has a bottom surface that substantially flat. A seed pattern is formed on the first sidewall of the first portion, the second sidewall of the second portion and the bottom surface of the second portion of the via hole. A first thickness (Vt) of the seed pattern on the first sidewall of the first portion is less than a second thickness (VIt) of the seed pattern on the second sidewall of the second portion. A through via is formed to fill the via hole.
Abstract translation: 公开了制造半导体器件的方法。 在该方法中,设置具有第一表面和第二表面的基板。 第二表面与第一表面相对。 通孔形成为从第一表面朝向第二表面穿透基板。 通孔包括第一部分和第二部分。 第一部分具有基本上垂直于第一表面的第一侧壁。 第二部分具有从第一表面朝向第二表面逐渐减小的第二侧壁,并且具有基本平坦的底面。 在第一部分的第一侧壁,第二部分的第二侧壁和通孔的第二部分的底表面上形成种子图案。 第一部分的第一侧壁上的种子图案的第一厚度(Vt)小于第二部分的第二侧壁上的种子图案的第二厚度(VIt)。 形成通孔以填充通孔。
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2.
公开(公告)号:US20150255301A1
公开(公告)日:2015-09-10
申请号:US14637420
申请日:2015-03-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seung-Hoon Park , Deog-Ja Koo , Gyung-Jin Min
IPC: H01L21/3065 , H01L23/528 , H01L21/768
CPC classification number: H01L21/30655 , H01L21/76871 , H01L21/76879 , H01L21/76898 , H01L23/481 , H01L2224/16145
Abstract: A method of manufacturing a semiconductor device is disclosed. In the method, a substrate having a first surface and a second surface is provided. The second surface is opposed to the first surface. A via hole is formed to penetrate the substrate from the first surface toward the second surface. The via hole includes a first portion and a second portion. The first portion has a first sidewall which is substantially perpendicular to the first surface. The second portion has a second sidewall which gradually decreases from the first surface toward the second surface, and has a bottom surface that substantially flat. A seed pattern is formed on the first sidewall of the first portion, the second sidewall of the second portion and the bottom surface of the second portion of the via hole. A first thickness (Vt) of the seed pattern on the first sidewall of the first portion is less than a second thickness (VIt) of the seed pattern on the second sidewall of the second portion. A through via is formed to fill the via hole.
Abstract translation: 公开了制造半导体器件的方法。 在该方法中,设置具有第一表面和第二表面的基板。 第二表面与第一表面相对。 通孔形成为从第一表面朝向第二表面穿透基板。 通孔包括第一部分和第二部分。 第一部分具有基本上垂直于第一表面的第一侧壁。 第二部分具有从第一表面朝向第二表面逐渐减小的第二侧壁,并且具有基本平坦的底面。 在第一部分的第一侧壁,第二部分的第二侧壁和通孔的第二部分的底表面上形成种子图案。 第一部分的第一侧壁上的种子图案的第一厚度(Vt)小于第二部分的第二侧壁上的种子图案的第二厚度(VIt)。 形成通孔以填充通孔。
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公开(公告)号:US09772296B2
公开(公告)日:2017-09-26
申请号:US14460814
申请日:2014-08-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byung-Bok Kang , Seok-Min Kang , Bon-Ok Koo , Kyoung-Hwan Kim , Myung-Woo Kim , In-Gi Kim , Hyun-Chul Kim , Sung-Ki Roh , Gyung-Jin Min , Eun-Seok Lee , Jin-Suk Hong
CPC classification number: G01N21/9501 , G01N21/8851 , G01N2021/8887
Abstract: In a method of inspecting a surface of a substrate, a first surface image of the substrate before loaded into a process chamber may be obtained. The first surface image may be processed to detect a defect on the surface of the substrate. Thus, the surfaces of all of the substrate may be inspected during a process may be performed without transferring the substrates.
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