公开(公告)号：US20250142810A1

公开(公告)日：2025-05-01

申请号：US18675285

申请日：2024-05-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： TAEJIN KIM ,  HYUNGEUN CHOI ,  TAEJIN PARK ,  EUIJOONG SHIN ,  SANGHO LEE

IPC: H10B12/00 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor memory device includes a bit line extending above a substrate in a second horizontal direction, first and second active patterns beneath the bit line, each of the first and second active patterns having a first surface in contact with the bit line without a dopant source layer therebetween and a second surface opposite to the first surface in a vertical direction, a back-gate electrode between the first and second active patterns and extending above the substrate in a first horizontal direction by crossing the bit line, a first word line extending in the first horizontal direction at one side of the first active pattern, a second word line extending in the first horizontal direction at an opposite side of the second active pattern, and contact patterns in contact with the second surfaces of the first and second active patterns.