公开(公告)号：US20240296884A1

公开(公告)日：2024-09-05

申请号：US18662681

申请日：2024-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Eun SHIN ,  Jeong UK KANG ,  Hyun Jin CHOI

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10

CPC classification number: G11C11/5628 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10

Abstract: A storage controller for writing first data to a first memory cell by performing programming of the first memory cell N-times, where N is a positive integer greater than 1, includes a write amplification manager and a central processing unit. The write amplification manager checks whether the first data is invalid data before an Nth programming of the first memory cell is performed, and the central processing unit does not perform the N-th programming of the first memory cell when the first data is the invalid data.

公开(公告)号：US20230154529A1

公开(公告)日：2023-05-18

申请号：US17847948

申请日：2022-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Eun SHIN ,  Jeong Uk KANG ,  Hyun Jin CHOI

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10

CPC classification number: G11C11/5628 ,  G11C11/5671 ,  G11C16/08 ,  G11C16/10 ,  G11C16/0483

Abstract: A storage controller for writing first data to a first memory cell by performing programming of the first memory cell N-times, where N is a positive integer greater than 1, includes a write amplification manager and a central processing unit. The write amplification manager checks whether the first data is invalid data before an Nth programming of the first memory cell is performed, and the central processing unit does not perform the N-th programming of the first memory cell when the first data is the invalid data.

公开(公告)号：US20220374174A1

公开(公告)日：2022-11-24

申请号：US17883261

申请日：2022-08-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wan-Soo CHOI ,  Young Wook KIM ,  Dong Eun SHIN ,  Yong Chan JO

IPC: G06F3/06

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.

公开(公告)号：US20210004179A1

公开(公告)日：2021-01-07

申请号：US16745451

申请日：2020-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wan-Soo CHOI ,  Young Wook KIM ,  Dong Eun SHIN ,  Yong Chan JO

IPC: G06F3/06 ,  G06F9/54 ,  G06F9/48

Abstract: A storage device includes an input stage receiving a first command, a queue manager allocating a first queue entry for the first command, a pre-processor storing the first command in the first queue entry and updating a task list with the first command and a core executing the first command in accordance with an order specified in the updated task list. At least one of the queue manager and the pre-processor is implemented in a customized logic circuit.