Abstract:
A display panel includes a base substrate, on which a pixel area and a peripheral area are defined, a semiconductor pattern disposed on the base substrate, a display element disposed in the pixel area of the base substrate and a first thin film transistor configured to control the display element, where the first thin film transistor includes an input electrode a first portion of the semiconductor pattern and an output electrode disposed on a second portion of the semiconductor pattern, a third portion of the semiconductor pattern between the first portion and the second portion; and a control electrode disposed on the third portion and insulated from the third portion.
Abstract:
A thin film transistor substrate includes a substrate, an anodized aluminum layer on the substrate, a polycrystalline silicon layer covering the anodized aluminum layer, and an insulating layer covering the polycrystalline silicon layer.
Abstract:
A display panel includes a base substrate including a pixel area and a peripheral area, a semiconductor layer disposed on a portion of the base substrate, a display element disposed in the pixel area, and a thin film transistor which controls the display element and includes an input electrode, an output electrode and a control electrode, in which the semiconductor layer includes a first portion disposed on the input electrode of the first thin film transistor, a second portion disposed on the output electrode of the first thin film transistor, and a third portion which connects the first portion and the second portion, overlaps the control electrode of the first thin film transistor, and defines a channel of the first thin film transistor.