Abstract:
A display device includes a base layer, a pixel disposed on the base layer, and a scan driving circuit disposed on the base layer and connected to the pixel. The scan driving circuit includes a plurality of stages, a jth stage among the plurality of stages is connected to at least one adjacent stage through carry wirings. The jth stage includes a plurality of control transistors connected to a first control node, and a control wiring connecting the first control node and the plurality of control transistors. Two or more insulation layers are arranged between the control wiring and the carry wirings.
Abstract:
A liquid crystal display includes a plurality of pixel electrodes and common electrodes disposed on a first substrate that overlap each other with a passivation layer interposed therebetween, and a connection portion disposed between a common voltage applying unit and the common electrode. The common electrode has a plurality of first cutouts, the passivation layer has a plurality of second cutouts, and the first cutout and the second cutout have substantially the same planar shape. The connection portion includes a lower connection portion formed from a same layer as the common electrode, and an upper connection portion disposed on the lower connection portion that includes a low resistance metal.
Abstract:
A display device includes a first data line group disposed in a fan-out area and including a plurality of first data lines extending to a display area adjacent to the fan-out area, a second data line group disposed in the fan-out area and including a plurality of second data lines extending to the display area adjacent to the fan-out area, a plurality of pixels disposed in the display area and connected to the first and second data lines, and a dummy pattern disposed in the fan-out area between the first data line group and the second data line group, where the dummy pattern is in a floating state.
Abstract:
A curved display device includes a curved display panel including a first substrate and a second substrate facing the first substrate, the first substrate including a display area for displaying an image and a non-display area, a sealing member interposed between the first substrate and the second substrate and surrounding the display area, and a reinforcement member arranged on an outside of the sealing member, wherein the curved display panel includes a first side surface including a curved side, a second side surface including a curved side and facing the first side surface, a third side surface and a fourth side surface connecting the first side surface and the second side surface, the third side surface and the fourth side surface facing each other, and wherein the reinforcement member is attached to at least one of the first side surface and the second side surface.
Abstract:
A defect evaluation method for evaluating a defect due to electrostatic discharge includes obtaining a charged map of a lower part of a test object, preparing a test pattern simulating the charged map of the lower part of the test object, contacting the test object to the test pattern, and applying a voltage to the test pattern. Accordingly, to simulate and evaluate the defect that may occur during a manufacturing process of the test object in advance. In addition, using a result obtained by the simulation and the evaluation, an arrangement of a portion vulnerable to the defect of a structure in the test object may be changed.
Abstract:
A liquid crystal display according to an exemplary embodiment of the present disclosure includes: a gate line, a data line, and a compensation voltage line disposed on an insulation substrate; a first passivation layer disposed on the gate line, the data line, and the compensation voltage line; a pixel electrode connected to the gate line and the data line, and a compensation electrode connected to the compensation voltage line, disposed on the first passivation layer; and a common electrode formed on the first passivation layer, wherein the compensation electrode overlaps at least a portion of the data line, and the compensation voltage line is formed with the same layer as the data line.
Abstract:
In a thin film transistor array panel and a method of manufacturing the same, a thin passivation layer is positioned between a first field generating electrode and a second field generating electrode. The thin passivation layer overlaps the first and second field generating electrodes. The thin passivation layer includes a transparent photosensitive organic material. When forming the first field generating electrode, the passivation layer is used as a photosensitive film. Accordingly, the passivation layer and the first field generating electrode may be formed using a same single photo-mask. Accordingly, the manufacturing cost of the thin film transistor array panel may be reduced.