Maximal transition hamming codes
    2.
    发明授权

    公开(公告)号:US09658921B2

    公开(公告)日:2017-05-23

    申请号:US14338109

    申请日:2014-07-22

    Inventor: Jalil Kamali Ken Hu

    CPC classification number: G06F11/10 H03M13/19 H03M13/31

    Abstract: An encoder includes: an input configured to receive a plurality of data bits; a processor configured to encode the data bits utilizing a Hamming encoding operation to generate a plurality of coded bits; and an output configured to output the plurality of coded bits, wherein the processor is configured to reduce a maximum run length of the plurality of coded bits in comparison to coded bits corresponding to standard Hamming code.

    APPARATUS AND METHOD FOR COMPACT BIT-PLANE DATA COMPRESSION
    3.
    发明申请
    APPARATUS AND METHOD FOR COMPACT BIT-PLANE DATA COMPRESSION 有权
    紧凑型平面数据压缩的装置和方法

    公开(公告)号:US20150098498A1

    公开(公告)日:2015-04-09

    申请号:US14451150

    申请日:2014-08-04

    Inventor: Ning Lu Ken Hu

    CPC classification number: H04N19/18 H04N19/13 H04N19/34 H04N19/436 H04N19/93

    Abstract: An encoder includes a plurality of registers and is configured to: sequentially receive an array of coefficients, each of the coefficients being decomposed into a plurality of bits located at a plurality of corresponding bit positions of the coefficient; and concurrently operate on the plurality of bits of each of the coefficients.

    Abstract translation: 编码器包括多个寄存器,并且被配置为:顺序地接收系数阵列,每个系数被分解成位于系数的多个相应比特位置的多个位; 并且同时对每个系数的多个位进行操作。

    MAXIMAL TRANSITION HAMMING CODES
    5.
    发明申请
    MAXIMAL TRANSITION HAMMING CODES 有权
    最大转换标记码

    公开(公告)号:US20150121164A1

    公开(公告)日:2015-04-30

    申请号:US14338109

    申请日:2014-07-22

    Inventor: Jalil Kamali Ken Hu

    CPC classification number: G06F11/10 H03M13/19 H03M13/31

    Abstract: An encoder includes: an input configured to receive a plurality of data bits; a processor configured to encode the data bits utilizing a Hamming encoding operation to generate a plurality of coded bits; and an output configured to output the plurality of coded bits, wherein the processor is configured to reduce a maximum run length of the plurality of coded bits in comparison to coded bits corresponding to standard Hamming code.

    Abstract translation: 编码器包括:被配置为接收多个数据位的输入; 处理器,被配置为使用汉明编码操作对数据比特进行编码,以生成多个编码比特; 以及被配置为输出所述多个编码比特的输出,其中所述处理器被配置为与对应于标准汉明码的编码比特相比,减少所述多个编码比特的最大游程长度。

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