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公开(公告)号:US20220231107A1
公开(公告)日:2022-07-21
申请号:US17472088
申请日:2021-09-10
Applicant: Samsung Display Co., Ltd.
Inventor: Doo-Young Lee , Jong Hee Kim , Yoo Mi Ra , Kyung-Ho Park , Geun Ho Lee , Chang-Soo Lee , Tak-Young Lee , Bo Yong Chung , Jung Hwan Hwang
IPC: H01L27/32
Abstract: A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.
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公开(公告)号:US12190791B2
公开(公告)日:2025-01-07
申请号:US18143011
申请日:2023-05-03
Applicant: Samsung Display Co., Ltd.
Inventor: Hyuk Kim , Jonghee Kim , Doo-Young Lee , Chang-Soo Lee , Sang-Uk Lim , Boyong Chung
Abstract: Provided is a gate driving circuit comprising an N-th stage and an N+1-th stage. The N-th stage outputs an N-th scan gate signal based on an N-th scan clock signal, a voltage of a QN node, and a voltage of a QBN node and to output an N-th carry signal based on an N-th carry clock signal, the voltage of the QN node, and the voltage of the QBN node. The N+1-th stage outputs an N+1-th scan gate signal based on an N+1-th scan clock signal, a voltage of a QN+1 node, and the voltage of the QBN node and an N+1-th carry signal based on an N+1-th carry clock signal, the voltage of the QN+1 node, and the voltage of the QBN node. The N-th stage and the N+1-th stage share an inverting circuit. The inverting circuit controls the QBN node based on a third signal. N is a positive integer.
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公开(公告)号:US12022692B2
公开(公告)日:2024-06-25
申请号:US17472088
申请日:2021-09-10
Applicant: Samsung Display Co., Ltd.
Inventor: Doo-Young Lee , Jong Hee Kim , Yoo Mi Ra , Kyung-Ho Park , Geun Ho Lee , Chang-Soo Lee , Tak-Young Lee , Bo Yong Chung , Jung Hwan Hwang
IPC: H01L29/08 , H10K59/121 , H10K59/131
CPC classification number: H10K59/1216 , H10K59/1213 , H10K59/131
Abstract: A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.
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公开(公告)号:US12106719B2
公开(公告)日:2024-10-01
申请号:US18507102
申请日:2023-11-13
Applicant: Samsung Display Co., Ltd.
Inventor: Bogyeong Kim , Doo-Young Lee , Tak-Young Lee , Boyong Chung , Byungseok Choi
IPC: G09G3/32 , G09G3/3258 , H10K59/121 , H10K59/131
CPC classification number: G09G3/3258 , H10K59/121 , H10K59/131 , G09G2300/0426 , G09G2300/0842
Abstract: A display device includes a substrate, a first conductive layer disposed on the substrate, a second conductive layer disposed on the first conductive layer and a third conductive layer disposed on the second conductive layer. The first conductive layer includes a data line extending in a first direction. The second conductive layer includes a first scan line extending in a second direction intersecting the first direction, and a second scan line spaced apart from the first scan line and extending in the second direction. The third conductive layer includes a first driving voltage line extending in the second direction, a first common voltage line spaced apart from the first driving voltage line and extending in the second direction, and a pixel electrode disposed between the first driving voltage line and the first common voltage line in a plan view.
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