DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20220359791A1

    公开(公告)日:2022-11-10

    申请号:US17739600

    申请日:2022-05-09

    Abstract: A display device includes a substrate, a first and second bank patterns disposed on a substrate, a gate insulating layer overlapping the first bank pattern, a first transistor including a first and second electrodes disposed on the substrate with the first bank pattern interposed therebetween in a thickness direction, a first semiconductor pattern connected to the first electrode and the second electrode and disposed on a side surface of the first bank pattern, and a first gate electrode disposed to correspond to the first semiconductor pattern with the first semiconductor pattern and the gate insulating layer interposed therebetween, a light emitting element connected to the first transistor and having a first end part and a second end part, a first pixel electrode that contacts the first end part of the light emitting element, and a second pixel electrode that contacts the second end part of the light emitting element.

    DISPLAY DEVICE
    3.
    发明申请

    公开(公告)号:US20210151497A1

    公开(公告)日:2021-05-20

    申请号:US16998470

    申请日:2020-08-20

    Abstract: A display device includes a substrate; a semiconductor layer disposed on the substrate; a gate insulating film disposed on the semiconductor layer; a gate layer disposed on the gate insulating film and insulated from the semiconductor layer; an insulating film disposed on the semiconductor layer and the gate layer; and a metal layer disposed on the insulating film, wherein the semiconductor layer and the gate layer are electrically connected through the metal layer, and the semiconductor layer overlaps the gate layer in a plan view.

    DISPLAY DEVICE
    4.
    发明申请

    公开(公告)号:US20210134923A1

    公开(公告)日:2021-05-06

    申请号:US16915426

    申请日:2020-06-29

    Abstract: A display device includes a substrate which includes a display area and a non-display area, a transistor disposed in the display area, a pad disposed in the non-display area, and an insulating layer which is disposed on the transistor and defines an opening which overlaps the pad in a plan view. The pad includes a main layer, a first auxiliary layer on the main layer, and a second auxiliary layer on the first auxiliary layer, and the second auxiliary layer defines the opening.

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