公开(公告)号：US20240145364A1

公开(公告)日：2024-05-02

申请号：US18386069

申请日：2023-11-01

Applicant: STMicroelectronics S.r.l.

Inventor： Aurora SANNA ,  Cristina SOMMA ,  Damian HALICKI

IPC: H01L23/498 ,  H01L23/48 ,  H01L23/528

CPC classification number: H01L23/49816 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/5286

Abstract: A BGA package includes an array of electrically conductive balls providing electrical contact for a semiconductor die. A power channel is provided to convey power supply current towards the semiconductor die. The power channel is formed by a stack of electrically conductive planes. The electrically conductive planes are stacked in a stepped arrangement wherein a number of stacked planes in each step of the stack increases in a direction from a distal end to a proximal end of the power channel. Adjacent electrically conductive planes in the stack of the power channel are electrically coupled with electrically conductive vias extending therebetween. Current conduction paths towards the die area thus have resistance values that decrease from the distal end to the proximal end of the power channel.

公开(公告)号：US20240038650A1

公开(公告)日：2024-02-01

申请号：US18223838

申请日：2023-07-19

Applicant: STMicroelectronics S.r.l.

Inventor： Damian HALICKI ,  Michele DERAI

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L23/3107 ,  H01L28/10 ,  H01L25/0655 ,  H01L21/561 ,  H01L23/49822

Abstract: Semiconductor devices of the type currently referred to as a System in a Package (SiP) and having embedded therein a transformer are produced by embedding at least one semiconductor chip in an insulating encapsulation at a first portion thereof. Over a second portion thereof at least partly non-overlapping with the first portion, a stacked structure is formed including multiple layers of electrically insulating material as well as respective patterns of electrically conductive material. The respective patterns of electrically conductive material have: a planar coil geometry for providing electrically conductive coils such as the windings of a transformer and a geometrical distribution providing electrically conductive connections to one or more semiconductor chips.

公开(公告)号：US20220173064A1

公开(公告)日：2022-06-02

申请号：US17537112

申请日：2021-11-29

Applicant: STMicroelectronics S.r.l.

Inventor： Cristina SOMMA ,  Aurora SANNA ,  Damian HALICKI

IPC: H01L23/00 ,  H01L23/498

Abstract: A semiconductor die is mounted at a die area of a ball grid array package that includes an array of electrically-conductive ball. A power channel conveys a power supply current to the semiconductor die. The power channel is formed by an electrically-conductive connection plane layers extending in a longitudinal direction between a distal end at a periphery of the package and a proximal end at the die area. A distribution of said electrically-conductive balls is made along the longitudinal direction. The electrically-conductive connection plane layer includes subsequent portions in the longitudinal direction between adjacent electrically-conductive balls of the distribution. Respective electrical resistance values of the subsequent portions monotonously decrease from the distal end to the proximal end. A uniform distribution of power supply current over the length of the power channel is thus facilitated.