公开(公告)号：US11372782B2

公开(公告)日：2022-06-28

申请号：US16811117

申请日：2020-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Uk Kim ,  Yohan Ko ,  Insoon Jo

IPC: G06F13/16 ,  G06F9/54 ,  G06F13/42 ,  G06F13/40

Abstract: A computing system includes a host, a first electronic device connected to the host, and a second electronic device that communicates with the host through the first electronic device. The first electronic device requests a command written in a submission queue of the host based on a doorbell transmitted from the host, stores the command transmitted from the host, requests write data stored in a data buffer of the host, and stores the write data of the data buffer transmitted from the host.

公开(公告)号：US20210049114A1

公开(公告)日：2021-02-18

申请号：US16811117

申请日：2020-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Uk KIM ,  Yohan Ko ,  Insoon Jo

IPC: G06F13/16 ,  G06F13/40 ,  G06F13/42 ,  G06F9/54

Abstract: A computing system includes a host, a first electronic device connected to the host, and a second electronic device that communicates with the host through the first electronic device. The first electronic device requests a command written in a submission queue of the host based on a doorbell transmitted from the host, stores the command transmitted from the host, requests write data stored in a data buffer of the host, and stores the write data of the data buffer transmitted from the host.

公开(公告)号：US11481125B2

公开(公告)日：2022-10-25

申请号：US17019429

申请日：2020-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yohan Ko ,  Dong-Uk Kim ,  Insoon Jo ,  Jooyoung Hwang

IPC: G06F3/06

Abstract: A storage device includes a first interface, an operation circuit, and a nonvolatile memory. The first interface receives a first data chunk from a host device. The operation circuit generates first processed data by processing the first data chunk and generates a first signal indicating a size of the first processed data. The nonvolatile memory stores the first processed data in a storage location, when the storage location at which the first processed data are to be stored is designated to the storage device based on the first signal. The first interface outputs the first signal to the host device.

公开(公告)号：US11775451B2

公开(公告)日：2023-10-03

申请号：US17825093

申请日：2022-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Uk Kim ,  Yohan Ko ,  Insoon Jo

IPC: G06F13/16 ,  G06F9/54 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/1621 ,  G06F9/544 ,  G06F9/546 ,  G06F13/1673 ,  G06F13/404 ,  G06F13/4221

Abstract: A computing system includes a host, a first electronic device connected to the host, and a second electronic device that communicates with the host through the first electronic device. The first electronic device requests a command written in a submission queue of the host based on a doorbell transmitted from the host, stores the command transmitted from the host, requests write data stored in a data buffer of the host, and stores the write data of the data buffer transmitted from the host.

公开(公告)号：US20220283961A1

公开(公告)日：2022-09-08

申请号：US17825093

申请日：2022-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Uk KIM ,  Yohan Ko ,  Insoon Jo

IPC: G06F13/16 ,  G06F9/54 ,  G06F13/42 ,  G06F13/40

Abstract: A computing system includes a host, a first electronic device connected to the host, and a second electronic device that communicates with the host through the first electronic device. The first electronic device requests a command written in a submission queue of the host based on a doorbell transmitted from the host, stores the command transmitted from the host, requests write data stored in a data buffer of the host, and stores the write data of the data buffer transmitted from the host.

公开(公告)号：US11321254B2

公开(公告)日：2022-05-03

申请号：US17007553

申请日：2020-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Uk Kim ,  Yohan Ko ,  Insoon Jo ,  Jooyoung Hwang

IPC: G06F13/28 ,  G06F13/16 ,  G06F13/42

Abstract: A computing system includes a host, a first electronic device including a memory and an accelerator, and a second electronic device including a direct memory access (DMA) engine. Based on a command transmitted from the host through the first electronic device, the DMA engine transmits data and completion information of the command to the first electronic device. The memory includes a data buffer storing the data and a completion queue buffer storing the completion information. The accelerator executes a calculation on the data. The DMA engine transmits the data to the first electronic device and then transmits the completion information to the first electronic device.