公开(公告)号：US20240421012A1

公开(公告)日：2024-12-19

申请号：US18210134

申请日：2023-06-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangsick PARK ,  Chungsun LEE ,  Hanmin LEE ,  Seungyoon JUNG

IPC: H01L23/24 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device includes a first semiconductor chip having a first through silicon via (TSV). A second semiconductor chip is arranged on the first semiconductor chip and includes a second TSV positioned on a same vertical line as the first TSV. A conductive pad is disposed on each of the first TSV and the second TSV. The conductive pad electrically connects the first semiconductor chip and the second semiconductor chip to each other. A warpage prevention metal structure is disposed on an upper surface of the first semiconductor chip or an upper surface of the second semiconductor chip.

公开(公告)号：US20240162193A1

公开(公告)日：2024-05-16

申请号：US18213852

申请日：2023-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongyo KIM ,  UN-BYOUNG KANG ,  SANG-SICK PARK ,  Hanmin LEE ,  Seungyoon JUNG

IPC: H01L25/065 ,  B23K26/38 ,  B23K26/40 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48

CPC classification number: H01L25/0657 ,  B23K26/38 ,  B23K26/40 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  B23K2101/40 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06541

Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a first semiconductor chip, a lower adhesion layer on the first semiconductor chip, a second semiconductor chip on the lower adhesion layer, an upper adhesion layer on the second semiconductor chip, and a third semiconductor chip on the upper adhesion layer. The lower adhesion layer includes a first cutting surface connected to a top surface of the lower adhesion layer. The upper adhesion layer is in contact with the first cutting surface of the lower adhesion layer.