公开(公告)号：US20040211901A1

公开(公告)日：2004-10-28

申请号：US10421477

申请日：2003-04-22

Applicant: RAYTHEON COMPANY

Inventor： Athanasios J. Syllaios ,  Prem Chahal

IPC: G01J005/02

CPC classification number: G01J5/08 ,  G01J3/51 ,  G01J5/0862 ,  G01J5/20 ,  G01N21/3504 ,  H01L27/14618 ,  H01L27/14649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for forming an integrated circuit includes providing an array of detectors proximate an outer surface of a first substrate layer. The array of detectors operate to detect the presence or absence of one or more wavelengths within a spectrum of transmitted energy. One or more filters are provided proximate a second substrate layer. The one or more filters operate to affect the spectrum of transmitted energy through the one or more filters. The second substrate layer is proximate to the outer surface of the first substrate layer to enclose the array of detectors in a vacuum environment.

Abstract translation: 一种用于形成集成电路的方法包括提供靠近第一基底层的外表面的检测器阵列。 检测器阵列用于检测在发射能量谱范围内存在或不存在一个或多个波长。 在第二基底层附近提供一个或多个过滤器。 一个或多个滤波器操作以影响通过一个或多个滤波器的发射能量的频谱。 第二基底层靠近第一基底层的外表面以在真空环境中包围检测器阵列。