公开(公告)号：US11804428B2

公开(公告)日：2023-10-31

申请号：US17097327

申请日：2020-11-13

Applicant: QUALCOMM Incorporated

Inventor： Wen Yin ,  Yonghao An ,  Manuel Aldrete

IPC: H01L21/48 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/49822

Abstract: Disclosed is a package and method of forming the package with a mixed pad size. The package includes a first set of pads having a first size and a first pitch, where the first set of pads are solder mask defined (SMD) pads. The package also includes a second set of pads having a second size and a second pitch, where the second set of pads are non-solder mask defined (NSMD) pads.

公开(公告)号：US11545411B2

公开(公告)日：2023-01-03

申请号：US16941487

申请日：2020-07-28

Applicant: QUALCOMM Incorporated

Inventor： Wen Yin ,  Yonghao An ,  Reynante Tamunan Alvarado

IPC: H01L23/367 ,  H01L21/56 ,  H01L23/552 ,  H01L23/00

Abstract: A package that includes a substrate, an integrated device, a plurality of first wire bonds, at least one second wire bond, and an encapsulation layer. The integrated device is coupled to the substrate. The plurality of first wire bonds is coupled to the integrated device and the substrate. The plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate. The at least one second wire bond is coupled to the integrated device. The at least one second wire bond is configured to be free of an electrical connection with a circuit of the integrated device. The encapsulation layer is located over the substrate and the integrated device. The encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.

公开(公告)号：US11189575B1

公开(公告)日：2021-11-30

申请号：US16874558

申请日：2020-05-14

Applicant: QUALCOMM Incorporated

Inventor： Supatta Niramarnkarn ,  Bin Xu ,  Wen Yin ,  Yonghao An

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/367 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: An integrated circuit (IC) package is described. The IC package includes a laminate substrate. The IC package also includes an active die on a surface of the laminate substrate. The IC package further includes fin-based thermal surface mount devices on the surface of the laminate substrate proximate the active die to provide an additional heat dissipation path.