Adjusting source voltage based on stored information

    公开(公告)号:US10042405B2

    公开(公告)日:2018-08-07

    申请号:US14920218

    申请日:2015-10-22

    Abstract: Apparatuses and methods to adjust a source voltage based on stored information are provided. The apparatus includes a circuit configured to receive power from a power source through a power distribution network, a storage medium storing data specifying one or more electrical characteristics of the circuit, and a control circuit configured to adjust a source voltage at the power source based on the data stored in the storage medium. The method includes receiving power by a circuit from a power source through a power distribution network, reading data specifying one or more electrical characteristics of the circuit from a storage medium, and adjusting a source voltage at the power source based on the data stored in the storage medium.

    Adjust voltage for thermal mitigation

    公开(公告)号:US10103714B2

    公开(公告)日:2018-10-16

    申请号:US15058001

    申请日:2016-03-01

    Abstract: Apparatuses and methods to adjust voltage for thermal mitigation are provided. The apparatus includes a circuit, a plurality of switches configured to provide power of a power domain to the circuit, a plurality of thermal sensors disposed at different locations about the circuit and configured to detect temperatures at the different locations, and a control circuit configured to determine that one of the detected temperatures at one of the locations exceeds a temperature threshold, and in response, adjust one or more of the plurality of switches in proximity with the one location to reduce power provided to the circuit. The method includes providing power of a power domain through a plurality of switches, detecting a temperature at a location exceeding a temperature threshold, and adjusting the plurality of switches in proximity with the location to reduce the power provided, in response to the detecting the temperature exceeding the temperature threshold.

    Systems and methods for adaptive clock design

    公开(公告)号:US09915968B2

    公开(公告)日:2018-03-13

    申请号:US15133068

    申请日:2016-04-19

    CPC classification number: G06F1/04 G06F1/08 G06F1/26 G06F1/305 H03K3/0315 H03L7/06

    Abstract: The present disclosure is directed to mitigating voltage droops. An aspect includes outputting, by a clock module coupled to a multiplexor, a first clock signal to the multiplexor, the first clock signal generated by a clock delay component of the clock module, receiving, by the clock module, a second clock signal from a phase-locked loop (PLL), wherein the PLL outputs a third clock signal to a processor coupled to the PLL and the multiplexor, selecting, by the multiplexor, the first clock signal to output to the processor based on detecting a droop in voltage on a power supply, and selecting, by the multiplexor, the third clock signal to output to the processor based on detecting that the droop in the voltage on the power supply has passed, wherein the clock module and the processor are coupled to the power supply.

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