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公开(公告)号:US20160285454A1
公开(公告)日:2016-09-29
申请号:US14671553
申请日:2015-03-27
Applicant: QUALCOMM Incorporated
Inventor: Vishal Gupta , Chifan Yung , Joseph Duncan
IPC: H03K19/0185
CPC classification number: H03K19/018507 , H03F3/2173 , H03F2203/30015 , H03F2203/30084 , H03F2203/30099 , H03F2203/30117 , H03F2203/30132 , H03K17/102
Abstract: Disclosed is a cascode configuration that moves the gate of the cascode substantially without delay relative to an output node by capacitively coupling the latter onto the cascode gates. The passive coupling eliminates the need for actively driving the gates of the cascode. In some embodiments, the only circuitry needed on the cascode gate may be a biasing circuit that limits the swing on the cascode gate between Vmax and 2×Vmax, where Vmax is a transistor device rating.
Abstract translation: 公开了一种共源共栅结构,其通过将电容耦合到共源共栅电路上而相对于输出节点基本上没有延迟地移动共源共栅的栅极。 无源耦合消除了积极驱动共源共栅的栅极的需要。 在一些实施例中,级联栅极上所需的唯一电路可以是限制Vmax和2×Vmax之间的共源共栅栅极上的摆幅的偏置电路,其中Vmax是晶体管器件额定值。
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公开(公告)号:US09548739B2
公开(公告)日:2017-01-17
申请号:US14671553
申请日:2015-03-27
Applicant: QUALCOMM Incorporated
Inventor: Vishal Gupta , Chifan Yung , Joseph Duncan
IPC: H03K5/12 , H03K3/00 , H03K19/0185 , H03F3/217 , H03K17/10
CPC classification number: H03K19/018507 , H03F3/2173 , H03F2203/30015 , H03F2203/30084 , H03F2203/30099 , H03F2203/30117 , H03F2203/30132 , H03K17/102
Abstract: Disclosed is a cascode configuration that moves the gate of the cascode substantially without delay relative to an output node by capacitively coupling the latter onto the cascode gates. The passive coupling eliminates the need for actively driving the gates of the cascode. In some embodiments, the only circuitry needed on the cascode gate may be a biasing circuit that limits the swing on the cascode gate between Vmax and 2×Vmax, where Vmax is a transistor device rating.
Abstract translation: 公开了一种共源共栅结构,其通过将电容耦合到共源共栅电路上而相对于输出节点基本上没有延迟地移动共源共栅的栅极。 无源耦合消除了积极驱动共源共栅的栅极的需要。 在一些实施例中,级联栅极上所需的唯一电路可以是限制Vmax和2×Vmax之间的共源共栅栅极上的摆幅的偏置电路,其中Vmax是晶体管器件额定值。
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