公开(公告)号：US11023165B2

公开(公告)日：2021-06-01

申请号：US16048355

申请日：2018-07-30

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F3/06

Abstract: A memory management method for a memory storage device including a rewritable non-volatile memory (RNVM) module is provided. The memory management method includes: receiving a plurality of commands; detecting a power glitch; and sending a command sequence which instructs the (RNVM) module to perform a first operation according to a first command among the plurality of commands and to ignore a second command among the plurality of commands after the power glitch occurs. A command queue may be scanned, and scanning may be suspended and the command queue resumed if a first-type command, such as an erase command or a write command, is found, or scanning continued if a second-type command, such as a read command, is found. A memory control circuit unit may proceed with a programming operation if it determines a write command is a non-full sequential programming command. Other commands may be suspended after a programming operation is completed according to a specific mark in a full sequential programming command. Depending on whether a read DMA command is found when scanning the command queue, read commands may be selectively invalidated or sent to the rewritable non-volatile memory module.

公开(公告)号：US20190073266A1

公开(公告)日：2019-03-07

申请号：US15798418

申请日：2017-10-31

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F11/10 ,  G06F3/06 ,  G11B20/18

Abstract: A decoding method is provided according to an exemplary embodiment. The method includes: reading first data and second data from a rewritable non-volatile memory module according to a read command; generating a re-read data set if a default decoding operation performed for the first data and the second data respectively fails; reading a to-be-decoded data set from the rewritable non-volatile memory module according to the re-read data set, and performing a first decoding operation for the first data based on the to-be-decoded data set; removing identification information corresponding to the second data from the re-read data set and storing the corrected second data if the second data is corrected in the first decode operation; and transmitting the corrected first data and the corrected second data to a host system.

公开(公告)号：US10007449B2

公开(公告)日：2018-06-26

申请号：US15002325

申请日：2016-01-20

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F3/03 ,  G06F3/06 ,  G06F11/07

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0793

Abstract: A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes determining whether a special event occurs; determining a type of at least one event in a work queue if the special event occurs, wherein the work queue stores a plurality of events and each event among the events is respectively configured to execute one corresponding work; adjusting the work executed by the at least one event from a first work to a second work according to the type of the at least one event, wherein the first work is different from the second work; and waiting to execute the second work after adjusting the first work to the second work.

公开(公告)号：US09823844B2

公开(公告)日：2017-11-21

申请号：US15075202

申请日：2016-03-21

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0619 ,  G06F3/0638 ,  G06F3/0659 ,  G06F3/0679

Abstract: A memory management method is provided. The method includes receiving a write command, a first data, and a first instruction information corresponding to the write command, wherein the first instruction information instructs writing the first data into at least one first logical sub-unit of a first logical unit; executing load-align operation to the first data according to the first instruction information; writing an aligned first data obtained through the load-align operation into a first physical programming unit if a predetermined event does not occur during the load-align operation; and stopping the load-align operation and storing the first data and the first instruction information into a first physical erasing unit if the predetermined event occurs during the load-align operation, wherein the first instruction information is stored as a first valid bits information corresponding to the first data in the first physical erasing unit.

公开(公告)号：US20170160961A1

公开(公告)日：2017-06-08

申请号：US15002325

申请日：2016-01-20

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F3/06 ,  G06F11/07

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0793

Abstract: A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes determining whether a special event occurs; determining a type of at least one event in a work queue if the special event occurs, wherein the work queue stores a plurality of events and each event among the events is respectively configured to execute one corresponding work; adjusting the work executed by the at least one event from a first work to a second work according to the type of the at least one event, wherein the first work is different from the second work; and waiting to execute the second work after adjusting the first work to the second work.

公开(公告)号：US10447314B2

公开(公告)日：2019-10-15

申请号：US15805152

申请日：2017-11-07

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: H03M13/37 ,  H04N19/423 ,  H04L1/00 ,  G06F12/02 ,  H04N19/44 ,  G11C11/406 ,  G11C11/4093 ,  G11C16/00 ,  G11C29/52 ,  G11C29/00 ,  G11C29/04 ,  G11C7/10

Abstract: A decoding method which includes: storing first data into a buffer memory which includes a first buffer region and a second buffer region; copying decoding data in the second buffer region to the first buffer region; performing a first type decoding operation for the first data based on the copied decoding data in the first buffer region, where the copied decoding data is different from original decoding data corresponding to the first data; and outputting decoded data if the first type decoding operation is successful.

公开(公告)号：US10318379B2

公开(公告)日：2019-06-11

申请号：US15798418

申请日：2017-10-31

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F3/06 ,  G06F11/10 ,  G11B20/18

Abstract: A decoding method is provided according to an exemplary embodiment. The method includes: reading first data and second data from a rewritable non-volatile memory module according to a read command; generating a re-read data set if a default decoding operation performed for the first data and the second data respectively fails; reading a to-be-decoded data set from the rewritable non-volatile memory module according to the re-read data set, and performing a first decoding operation for the first data based on the to-be-decoded data set; removing identification information corresponding to the second data from the re-read data set and storing the corrected second data if the second data is corrected in the first decode operation; and transmitting the corrected first data and the corrected second data to a host system.

公开(公告)号：US20190074852A1

公开(公告)日：2019-03-07

申请号：US15805152

申请日：2017-11-07

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: H03M13/37 ,  H04N19/423 ,  H04L1/00 ,  H04N19/44 ,  G11C29/52 ,  G06F12/02 ,  G11C11/406 ,  G11C11/4093

Abstract: A decoding method is provided according to an exemplary embodiment. The method includes: storing first data into a buffer memory which includes a first buffer region and a second buffer region; copying decoding data in the second buffer region to the first buffer region; performing a first type decoding operation for the first data based on the copied decoding data in the first buffer region, where the copied decoding data is different from original decoding data corresponding to the first data; and outputting decoded data if the first type decoding operation is successful.

公开(公告)号：US20170199669A1

公开(公告)日：2017-07-13

申请号：US15075202

申请日：2016-03-21

Applicant: PHISON ELECTRONICS CORP.

Inventor： Luong Khon

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0619 ,  G06F3/0638 ,  G06F3/0659 ,  G06F3/0679

Abstract: A memory management method is provided. The method includes receiving a write command, a first data, and a first instruction information corresponding to the write command, wherein the first instruction information instructs writing the first data into at least one first logical sub-unit of a first logical unit; executing load-align operation to the first data according to the first instruction information; writing an aligned first data obtained through the load-align operation into a first physical programming unit if a predetermined event does not occur during the load-align operation; and stopping the load-align operation and storing the first data and the first instruction information into a first physical erasing unit if the predetermined event occurs during the load-align operation, wherein the first instruction information is stored as a first valid bits information corresponding to the first data in the first physical erasing unit.