公开(公告)号：US20240405776A1

公开(公告)日：2024-12-05

申请号：US18326539

申请日：2023-05-31

Applicant: NVIDIA Corporation

Inventor： Stefan P. Sywyk ,  Lalit Gupta ,  Jesse Wang

IPC: H03K19/0185 ,  G06F30/36 ,  G11C8/08 ,  G11C8/10

Abstract: The disclosure introduces a level-shifter including a boost circuit that provides a “one-shot” pulse (a self-annihilating pulse) with the transitioning edge of the output signal. The pulse can be used to produce a faster output rise time and reduce the overall footprint of a level-shifter compared to conventional level-shifters. In one example the level-shifter includes: (1) input circuitry configured to receive one or more input signals from one or more input voltage domains, (2) output circuitry configured to provide an output signal, based on at least one of the one or more input signals, for an output voltage domain, wherein an operating voltage of the output voltage domain is greater than an operating voltage of the one or more input voltage domains, and (3) a boost circuit connected to the output circuitry and configured to provide a current pulse for a transition edge of the output signal.

公开(公告)号：US20240296875A1

公开(公告)日：2024-09-05

申请号：US18176836

申请日：2023-03-01

Applicant: NVIDIA Corporation

Inventor： Jason Golbus ,  Chad Parsons ,  Kirk Twardowski ,  Lalit Gupta ,  Jesse Wang ,  Ka Yun Lee ,  Amy Chen ,  Ramya Challa ,  Karan Gupta

IPC: G11C7/10 ,  G11C29/50

CPC classification number: G11C7/1048 ,  G11C7/1075 ,  G11C29/50004 ,  G11C29/50012 ,  G11C2029/5004

Abstract: The disclosure provides improvements for transmitting data between different voltage domains of an IC, such as a chip. The disclosure introduces a data transfer circuit that uses a multi-voltage RAM, referred to herein as MVRAM, for transmitting data across the different voltage domains. The MVRAM has multiple memory cells with write ports and read ports on different clock and voltage domains. Accordingly, a write operation can occur completely on the write domain voltage and the read operation can occur completely on the read domain voltage. In one example, the data transfer circuit includes: (1) write logic operating at a first operating voltage, (2) read logic operating at second operating voltage, and (3) a MVRAM with write ports that operate under the first operating voltage and read ports that operate under the second operating voltage.