Patent search ap:("MEDIATEK INC.") AND inv:"Huai-Mao Weng" Page 1

1.

发明公开
ERROR DETECTION AND CORRECTION DEVICE CAPABLE OF DETECTING HEAD POSITION OF SUSPICIOUS ERROR AND PERFORMING FORWARD ERROR PROPAGATION PATH TRACKING FOR PROVIDING INFORMATION NEEDED BY FOLLOW-UP ERROR CORRECTION AND ASSOCIATED METHOD 审中-公开

公开(公告)号：US20230308322A1

公开(公告)日：2023-09-28

申请号：US18116314

申请日：2023-03-02

Applicant: MEDIATEK INC.

Inventor： Deng-Fu Weng , Yu-Ting Liu , Che-Yu Chiang , Chung-Hsien Tsai , Huai-Mao Weng

IPC: H04L25/06 , H04L1/00 , H04L25/03

CPC classification number: H04L25/061 , H04L1/0013 , H04L25/03267

Abstract: An error detection and correction device includes a decision-feedback equalizer (DFE), a decision circuit, an error detection circuit, and an error correction circuit. The DFE equalizes a data signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a symbol decision signal. The error detection circuit performs forward error detection at symbol positions of consecutive symbols included in the symbol decision signal to detect a head position of suspicious error that affects at least one symbol in the symbol decision signal. The error correction circuit performs error correction upon the symbol decision signal in response to the head position of the suspicious error that is detected by the error detection circuit.

2.

发明授权
Error detection and correction device capable of detecting head position of suspicious error and performing forward error propagation path tracking for providing information needed by follow-up error correction and associated method 有权

公开(公告)号：US12143249B2

公开(公告)日：2024-11-12

申请号：US18116314

申请日：2023-03-02

Applicant: MEDIATEK INC.

Inventor： Deng-Fu Weng , Yu-Ting Liu , Che-Yu Chiang , Chung-Hsien Tsai , Huai-Mao Weng

IPC: H04L25/06 , H04L1/00 , H04L25/03

Abstract: An error detection and correction device includes a decision-feedback equalizer (DFE), a decision circuit, an error detection circuit, and an error correction circuit. The DFE equalizes a data signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a symbol decision signal. The error detection circuit performs forward error detection at symbol positions of consecutive symbols included in the symbol decision signal to detect a head position of suspicious error that affects at least one symbol in the symbol decision signal. The error correction circuit performs error correction upon the symbol decision signal in response to the head position of the suspicious error that is detected by the error detection circuit.

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