公开(公告)号：US10466596B2

公开(公告)日：2019-11-05

申请号：US14186744

申请日：2014-02-21

Applicant: KLA-Tencor Corporation

Inventor： Bill Pierson ,  Ramkumar Karur-Shanmugam ,  Chin-Chou Huang ,  Ady Levy ,  John Charles Robinson

IPC: G03F7/20

Abstract: The present disclosure is directed to a method of determining at least one correctable for a process tool. In an embodiment, the method includes the steps of: measuring one or more parameter values at one or more measurement locations of each field of a selection of measured fields of a wafer; estimating one or more parameter values for one or more locations of each field of a selection of unmeasured fields of the wafer; and determining at least one correctable for a process tool based upon the one or more parameter values measured at the one or more measurement locations of each field of the selection of measured fields of the wafer and the one or more parameter values estimated for the one or more locations of each field of the selection of unmeasured fields of the wafer.

公开(公告)号：US10509329B2

公开(公告)日：2019-12-17

申请号：US14597062

申请日：2015-01-14

Applicant: KLA-Tencor Corporation

Inventor： Sathish Veeraraghavan ,  Chin-Chou Huang

IPC: G03F7/20

Abstract: Systems and methods for providing improved measurements and predictions of geometry induced overlay errors are disclosed. Information regarding variations of overlay errors is obtained and analyzed to improve semiconductor processes as well as lithography patterning. In some embodiments, a cascading analysis process is utilized to breakdown the wafer geometry induced overlay into various components. The breakdown analysis may also be utilized to determine effectiveness factors for the various components, which in turn may improve the prediction accuracy of the impact of wafer geometry on wafer overlay. Furthermore, the measurements and/or predictions of the wafer geometry induced overlay errors may be utilized to provide overlay monitoring and correction solutions.

公开(公告)号：US20160062252A1

公开(公告)日：2016-03-03

申请号：US14597062

申请日：2015-01-14

Applicant: KLA-Tencor Corporation

Inventor： Sathish Veeraraghavan ,  Chin-Chou Huang

IPC: G03F9/00 ,  H01L21/68 ,  H01L21/67 ,  G03F7/20

CPC classification number: G03F7/70625 ,  G03F7/705 ,  G03F7/70633 ,  G03F7/70783

Abstract: Systems and methods for providing improved measurements and predictions of geometry induced overlay errors are disclosed. Information regarding variations of overlay errors is obtained and analyzed to improve semiconductor processes as well as lithography patterning. In some embodiments, a cascading analysis process is utilized to breakdown the wafer geometry induced overlay into various components. The breakdown analysis may also be utilized to determine effectiveness factors for the various components, which in turn may improve the prediction accuracy of the impact of wafer geometry on wafer overlay. Furthermore, the measurements and/or predictions of the wafer geometry induced overlay errors may be utilized to provide overlay monitoring and correction solutions.

Abstract translation: 公开了用于提供改进的测量和预测几何感应覆盖误差的系统和方法。 获得并分析关于覆盖误差变化的信息以改进半导体工艺以及光刻图案。 在一些实施例中，利用级联分析过程将晶片几何感应覆盖层分解成各种组件。 击穿分析还可以用于确定各种组件的有效性因素，这又可以提高晶片几何对晶片覆盖层的影响的预测精度。 此外，可以利用晶片几何引起的覆盖误差的测量和/或预测来提供覆盖监视和校正解决方案。

公开(公告)号：US20150241790A1

公开(公告)日：2015-08-27

申请号：US14186744

申请日：2014-02-21

Applicant: KLA-Tencor Corporation

Inventor： Bill Pierson ,  Ramkumar Karur-Shanmugam ,  Chin-Chou Huang ,  Ady Levy ,  John Charles Robinson

IPC: G03F7/20

Abstract: The present disclosure is directed to a method of determining at least one correctable for a process tool. In an embodiment, the method includes the steps of: measuring one or more parameter values at one or more measurement locations of each field of a selection of measured fields of a wafer; estimating one or more parameter values for one or more locations of each field of a selection of unmeasured fields of the wafer; and determining at least one correctable for a process tool based upon the one or more parameter values measured at the one or more measurement locations of each field of the selection of measured fields of the wafer and the one or more parameter values estimated for the one or more locations of each field of the selection of unmeasured fields of the wafer.

Abstract translation: 本公开涉及一种确定至少一个可校正过程工具的方法。 在一个实施例中，该方法包括以下步骤：测量晶片的测量场的选择的每个场的一个或多个测量位置处的一个或多个参数值; 估计所述晶片的未测量场的选择的每个场的一个或多个位置的一个或多个参数值; 以及基于在晶片的测量场的选择的每个场的一个或多个测量位置处测量的一个或多个参数值以及针对所述晶片的所测量的一个或多个参数值估计的一个或多个参数值来确定至少一个可校正的处理工具 每个场的更多位置选择晶片的未测量场。