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    METHODS AND APPARATUS RELATED TO VIRTUALIZATION OF DATA CENTER RESOURCES
    1.
    发明申请
    METHODS AND APPARATUS RELATED TO VIRTUALIZATION OF DATA CENTER RESOURCES 审中-公开

    公开(公告)号：US20180091444A1

    公开(公告)日：2018-03-29

    申请号：US15827676

    申请日：2017-11-30

    Applicant: Juniper Networks, Inc.

    Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

    IPC: H04L12/931 ,  H04L12/933 ,  H04L12/947

    CPC classification number: H04L49/35 ,  H04L49/00 ,  H04L49/1515 ,  H04L49/251 ,  H04L49/356 ,  H04L49/70

    Abstract: In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. A first set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have a protocol. Each peripheral processing device from the first set of peripheral processing devices is a storage node that has virtualized resources. The virtualized resources of the first set of peripheral processing devices collectively define a virtual storage resource interconnected by the switch core. A second set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have the protocol. Each peripheral processing device from the first set of peripheral processing devices is a compute node that has virtualized resources. The virtualized resources of the second set of peripheral processing devices collectively define a virtual compute resource interconnected by the switch core.

    EFFICIENT ARTHIMETIC LOGIC UNITS
    2.
    发明申请
    EFFICIENT ARTHIMETIC LOGIC UNITS 有权
    高效智能逻辑单元

    公开(公告)号：US20150058599A1

    公开(公告)日：2015-02-26

    申请号：US14529331

    申请日：2014-10-31

    Applicant: Juniper Networks, Inc.

    Inventor： Jean-Marc FRAILONG ,  Pradeep S. SINDHU ,  Jeffrey G. LIBBY ,  Jian Hui HUANG ,  Rajesh NAIR ,  John KEEN

    IPC: G06F9/28 ,  G06F9/30

    CPC classification number: G06F9/28 ,  G06F7/57 ,  G06F9/30 ,  G06F9/3001 ,  G06F9/30018 ,  G06F9/30072 ,  G06F9/30145 ,  G06F9/3859 ,  G06F9/3893 ,  G06F15/00

    Abstract: A processor may include a conditional arithmetic logic unit and a main arithmetic logic unit. The conditional arithmetic logic unit may perform a first arithmetic logic operation to generate a first result, and output the result. The main arithmetic logic unit may select input buses among a plurality of data buses that carry the first result from the conditional arithmetic logic unit, perform a second arithmetic logic operation on data provided by the selected input buses to generate a second result, and write the second result in a storage component.

    Abstract translation: 处理器可以包括条件算术逻辑单元和主算术逻辑单元。 条件算术逻辑单元可以执行第一算术逻辑运算以产生第一结果，并输出结果。 主算术逻辑单元可以选择携带来自条件算术逻辑单元的第一结果的多个数据总线中的输入总线，对由所选择的输入总线提供的数据执行第二运算逻辑运算以产生第二结果，并写入 第二个结果是存储组件。

    DATA STRUCTURE-LESS DISTRIBUTED FABRIC MULTICAST
    3.
    发明申请
    DATA STRUCTURE-LESS DISTRIBUTED FABRIC MULTICAST 审中-公开
    数据结构不足分布式织物

    公开(公告)号：US20130156032A1

    公开(公告)日：2013-06-20

    申请号：US13692701

    申请日：2012-12-03

    Applicant: Juniper Networks, Inc.

    Inventor： Alex BABAN ,  Jean-Marc FRAILONG ,  Kireeti KOMPELLA ,  Nitin KUMAR ,  Jamsheed WANIA ,  Murtuza ATTARWALA

    IPC: H04L12/18

    CPC classification number: H04L12/18 ,  H04L45/16 ,  H04L49/10 ,  H04L49/201

    Abstract: A network device receives a packet with a multicast nexthop identifier, and creates a mask that includes addresses of egress packet forwarding engines, of the network device, to which to provide the packet. The network device divides the mask into two portions, generates two copies of the packet, provides a first portion of the mask in a first copy of the packet, and provides a second portion of the mask in a second copy of the packet. The network device also forwards the first copy of the packet to an address of a first egress packet forwarding engine provided in the first portion of the mask, and forwards the second copy of the packet to an address of a second egress packet forwarding engine provided in the second portion of the mask.

    Abstract translation: 网络设备接收具有多播下一标识符的分组，并创建包括提供分组的网络设备的出站分组转发引擎的地址的掩码。 网络设备将掩码分成两部分，生成分组的两个副本，在分组的第一副本中提供该掩码的第一部分，并在分组的第二副本中提供该掩码的第二部分。 网络设备还将分组的第一副本转发到在掩码的第一部分中提供的第一出口分组转发引擎的地址，并将分组的第二副本转发到提供的第二出口分组转发引擎的地址 掩模的第二部分。

    METHODS AND APPARATUS RELATED TO A FLEXIBLE DATA CENTER SECURITY ARCHITECTURE
    4.
    发明申请
    METHODS AND APPARATUS RELATED TO A FLEXIBLE DATA CENTER SECURITY ARCHITECTURE 有权

    公开(公告)号：US20220150185A1

    公开(公告)日：2022-05-12

    申请号：US17585882

    申请日：2022-01-27

    Applicant: Juniper Networks, Inc.

    Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

    IPC: H04L49/00 ,  H04L41/0806 ,  H04L49/25 ,  H04L49/35 ,  H04L49/356 ,  H04L41/084

    Abstract: In one embodiment, edge devices can be configured to be coupled to a multi-stage switch fabric and peripheral processing devices. The edge devices and the multi-stage switch fabric can collectively define a single logical entity. A first edge device from the edge devices can be configured to be coupled to a first peripheral processing device from the peripheral processing devices. The second edge device from the edge devices can be configured to be coupled to a second peripheral processing device from the peripheral processing devices. The first edge device can be configured such that virtual resources including a first virtual resource can be defined at the first peripheral processing device. A network management module coupled to the edge devices and configured to provision the virtual resources such that the first virtual resource can be migrated from the first peripheral processing device to the second peripheral processing device.

    METHODS AND APPARATUS RELATED TO A FLEXIBLE DATA CENTER SECURITY ARCHITECTURE
    5.
    发明申请
    METHODS AND APPARATUS RELATED TO A FLEXIBLE DATA CENTER SECURITY ARCHITECTURE 审中-公开

    公开(公告)号：US20200014637A1

    公开(公告)日：2020-01-09

    申请号：US16574678

    申请日：2019-09-18

    Applicant: Juniper Networks, Inc.

    Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

    IPC: H04L12/935 ,  H04L12/24 ,  H04L12/947 ,  H04L12/931

    Abstract: In one embodiment, edge devices can be configured to be coupled to a multi-stage switch fabric and peripheral processing devices. The edge devices and the multi-stage switch fabric can collectively define a single logical entity. A first edge device from the edge devices can be configured to be coupled to a first peripheral processing device from the peripheral processing devices. The second edge device from the edge devices can be configured to be coupled to a second peripheral processing device from the peripheral processing devices. The first edge device can be configured such that virtual resources including a first virtual resource can be defined at the first peripheral processing device. A network management module coupled to the edge devices and configured to provision the virtual resources such that the first virtual resource can be migrated from the first peripheral processing device to the second peripheral processing device.

    METHODS AND APPARATUS FOR PROVIDING SERVICES IN A DISTRIBUTED SWITCH
    6.
    发明申请
    METHODS AND APPARATUS FOR PROVIDING SERVICES IN A DISTRIBUTED SWITCH 审中-公开

    公开(公告)号：US20190044888A1

    公开(公告)日：2019-02-07

    申请号：US16146806

    申请日：2018-09-28

    Applicant: Juniper Networks, Inc.

    Inventor： Krishna NARAYANASWAMY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Srinivasan JAGANNADHAN

    IPC: H04L12/931

    Abstract: In some embodiments, a non-transitory processor-readable medium stores code representing instructions to be executed by a processor. The code causes the processor to receive, at an edge device, a first data unit having a characteristic. The code causes the processor to identify, at a first time, an identifier of a service module associated with the characteristic in response to each entry from a set of entries within a flow table not being associated with the characteristic. The code causes the processor to define an entry in the flow table associated with the characteristic and the identifier of the service module. The code causes the processor to send the first data unit to the service module. The code causes the processor to receive, at the edge device, a second data unit having the characteristic, and send the second data unit to the service module based on the entry.

    HARDWARE IMPLEMENTATION OF COMPLEX FIREWALLS USING CHAINING TECHNIQUE
    9.
    发明申请
    HARDWARE IMPLEMENTATION OF COMPLEX FIREWALLS USING CHAINING TECHNIQUE 有权
    使用链接技术的复杂防火墙的硬件实现

    公开(公告)号：US20140325635A1

    公开(公告)日：2014-10-30

    申请号：US14318830

    申请日：2014-06-30

    Applicant: JUNIPER NETWORKS, INC.

    Inventor： Venkatasubramanian SWAMINATHAN ,  Deepak GOEL ,  Jianhui HUANG ,  John KEEN ,  Jean-Marc FRAILONG ,  Srinivasan JAGANNADHAN ,  Srilakshmi ADUSUMALLI

    IPC: H04L29/06

    CPC classification number: H04L63/0263 ,  H04L63/02 ,  H04L63/0209

    Abstract: A firewall device may include a forwarding component that includes a filter block. The filter block may obtain a first hardware-implemented filter, where a hardware implementation limits the first hardware-implemented filter to a maximum quantity of rules; determine whether a last rule associated with the accessed hardware-implemented filter includes a split-filter action, where the split-filter action identifies a second hardware-implemented filter; and link the second hardware-implemented filter to the first hardware-implemented filter to make the second hardware-implemented filter a logical continuation of the first hardware-implemented filter, in response to determining that the last rule includes the split-filter action. The filter block may further determine whether a particular rule of the first hardware-implemented filter includes a next-filter action, where the next filter action identifies a third hardware-implemented filter; and process the third hardware-implemented filter independently of the sequence of hardware attachment points.

    Abstract translation: 防火墙设备可以包括包括过滤器块的转发组件。 滤波器块可以获得第一硬件实现的滤波器，其中硬件实现将第一硬件实现的滤波器限制为最大数量的规则; 确定与所访问的硬件实现的过滤器相关联的最后规则是否包括拆分过滤器动作，其中分割过滤器动作标识第二硬件实现的过滤器; 以及响应于确定所述最后一个规则包括所述分割过滤器动作，将所述第二硬件实现的过滤器链接到所述第一硬件实现的过滤器，以使得所述第二硬件实现的过滤器是所述第一硬件实现的过滤器的逻辑延续。 滤波器块还可以确定第一硬件实现的滤波器的特定规则是否包括下一个滤波器动作，其中下一个滤波器动作识别第三硬件实现的滤波器; 并且独立于硬件连接点的顺序处理第三个硬件实现的过滤器。

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