公开(公告)号：US12087703B2

公开(公告)日：2024-09-10

申请号：US17293617

申请日：2019-11-27

申请人： Hitachi Astemo, Ltd.

发明人： Katsumi Ikegaya ,  Takayuki Oshima ,  Yoichiro Kobayashi ,  Masato Kita ,  Keishi Komoriyama ,  Minoru Migita ,  Yu Kawagoe ,  Kiyotaka Kanno

IPC分类号： H01L23/528 ,  B60R16/03 ,  H01L21/8234 ,  H01L23/00 ,  H01L23/522 ,  H01L27/088

CPC分类号： H01L23/562 ,  B60R16/03 ,  H01L21/823475 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/5286 ,  H01L27/088

摘要： In a semiconductor device equipped with a current mirror circuit, a highly reliable semiconductor device capable of suppressing a change in a mirror ratio of the current mirror circuit over time is provided. A current mirror circuit that includes a first MOS transistor and a plurality of MOS transistors paired with the first MOS transistor, and a plurality of wiring layers formed on an upper layer of the MOS transistor are provided. The plurality of wiring layers are arranged such that wiring patterns have the same shape within a predetermined range from an end of a channel region of each of the first MOS transistor and the plurality of MOS transistors.