公开(公告)号：US09992111B2

公开(公告)日：2018-06-05

申请号：US15003217

申请日：2016-01-21

Applicant: Cisco Technology, Inc.

Inventor： Ayan Banerjee ,  Raghava Sivaramu ,  Ambrish Mehta ,  Swaminathan Narayanan ,  Shiv Saini ,  Mehak Mahajan

IPC: H04L1/00 ,  H04L12/749 ,  H04L12/745 ,  H04L12/933 ,  H04L12/931 ,  H04L12/741 ,  H04L12/947 ,  H04L29/12

CPC classification number: H04L45/741 ,  H04L45/74 ,  H04L45/748 ,  H04L49/10 ,  H04L49/25 ,  H04L49/352 ,  H04L61/6068

Abstract: In one embodiment an approach is provided to efficiently program routes on line cards and fabric modules in a modular router to avoid hot spots and thus avoid undesirable packet loss. Each fabric module includes two separate processors or application specific integrated circuits (ASICs). In another embodiment, each fabric module processor is replaced by a pair of fabric module processors arranged in series with each other, and each processor is responsible for routing only, e.g., IPv4 or IPv6 traffic. The pair of fabric module processors communicates with one another via a trunk line and any packet received at either one of the pair is passed to the other of the pair before being passed back to a line card.

公开(公告)号：US20170214618A1

公开(公告)日：2017-07-27

申请号：US15003217

申请日：2016-01-21

Applicant: Cisco Technology, Inc.

Inventor： Ayan Banerjee ,  Raghava Sivaramu ,  Ambrish Mehta ,  Swaminathan Narayanan ,  Shiv Saini ,  Mehak Mahajan

IPC: H04L12/64 ,  H04L12/931 ,  H04L12/933 ,  H04L12/745

CPC classification number: H04L45/741 ,  H04L45/74 ,  H04L45/748 ,  H04L49/10 ,  H04L49/25 ,  H04L49/352 ,  H04L61/6068

Abstract: In one embodiment an approach is provided to efficiently program routes on line cards and fabric modules in a modular router to avoid hot spots and thus avoid undesirable packet loss. Each fabric module includes two separate processors or application specific integrated circuits (ASICs). In another embodiment, each fabric module processor is replaced by a pair of fabric module processors arranged in series with each other, and each processor is responsible for routing only, e.g., IPv4 or IPv6 traffic. The pair of fabric module processors communicates with one another via a trunk line and any packet received at either one of the pair is passed to the other of the pair before being passed back to a line card.