Low-thermal resistance pressing device for a socket

    公开(公告)号:US20220206059A1

    公开(公告)日:2022-06-30

    申请号:US17551246

    申请日:2021-12-15

    Abstract: The present invention relates to a low-thermal resistance pressing device for a socket, which mainly comprises a housing, an inner collar, a heat conductive pressing block, a bearing collar and a locking member. The locking member on the housing is used to lock the socket. The inner collar is threadedly engaged with the housing. The bearing collar is located between the inner collar and the heat conductive pressing block. In the case of rotating the inner collar in the housing, the bearing collar drives the heat conductive pressing block to move axially so as to exert an axial force to a device to be tested. Because the heat conductive pressing block protrudes from the upper and lower surfaces of the housing, one end thereof can be in contact with a temperature control module, and the other end thereof can be in contact with the device to be tested.

    DEVICE FOR PRESSING ELECTRONIC COMPONENT WITH DIFFERENT DOWNWARD FORCES

    公开(公告)号:US20180292452A1

    公开(公告)日:2018-10-11

    申请号:US15841626

    申请日:2017-12-14

    Abstract: A device for pressing an electronic component with different downward forces includes a first downward-pressure generating device, a depressing head, a second downward-pressure generating device and a depressing piston. The first downward-pressure generating device has the depressing head to apply a first downward pressure to the test socket and a portion of the electronic component. The second downward-pressure generating device has the depressing piston to apply a second downward pressure downward to another portion on the electronic component, so that the electronic component can couple electrically with a plurality of probe of the test socket. Thereupon, at least two downward-pressure generating devices are included to provide at least two different downward pressures to the electronic component solely or simultaneously to the electronic component and the testing equipment, such that specific downward-pressure requirements by precision electronic components can be fulfilled.

    Apparatus for Testing Package-on-Package Semiconductor Device and Method for Testing the Same
    3.
    发明申请
    Apparatus for Testing Package-on-Package Semiconductor Device and Method for Testing the Same 有权
    包装封装半导体器件测试装置及其测试方法

    公开(公告)号:US20150226794A1

    公开(公告)日:2015-08-13

    申请号:US14617892

    申请日:2015-02-09

    Inventor: Chien-Ming CHEN

    Abstract: An apparatus for testing a package-on-package semiconductor device comprises a pick and place device for loading a first chip into or unloading the first chip from a test socket and a lifting and rotating arm for moving a chip placement module which receives a second chip to a position between the pick and place device and the test socket. The pick and place device and the chip placement module are lowered, and then a test process is performed. After the test process is completed, the pick and place device and the chip placement module are lifted, and the lifting and rotating arm moves the chip placement module to one side of the pick and place device. Accordingly, a method for testing the semiconductor device could be performed automatically so as to greatly enhance test efficiency and accuracy and to significantly reduce costs.

    Abstract translation: 一种用于测试封装封装半导体器件的装置,包括用于将第一芯片从测试插座加载到第一芯片或从其卸载的拾取和放置装置,以及用于移动芯片放置模块的提升和旋转臂,芯片放置模块接收第二芯片 到拾取和放置设备与测试插座之间的位置。 拾取和放置装置和芯片放置模块降低,然后进行测试处理。 测试过程完成后,拾取和放置设备和芯片放置模块被提起,提升和旋转臂将芯片放置模块移动到拾取和放置设备的一侧。 因此,可以自动进行半导体装置的测试方法,大大提高测试效率和精度,并显着降低成本。

    ROTATABLE CUSHIONING PICK-AND-PLACE DEVICE

    公开(公告)号:US20210197405A1

    公开(公告)日:2021-07-01

    申请号:US17063752

    申请日:2020-10-06

    Abstract: A rotatable cushioning pick-and-place device primarily comprises a motor, a body, a cushioning module and a pick-and-place module. The cushioning module is disposed in a first chamber of the body and comprises a rotary bearing which is connected to a drive shaft of the motor, and coupled to a driven shaft sleeve through a rotary follower. The rotary follower is driven by the rotary bearing to drive the driven shaft sleeve to rotate, thereby allowing the rotary bearing to displace relative to the driven shaft sleeve axially. The cushioning spring is arranged between the rotary bearing and the driven shaft sleeve. A first sealing ring and a second sealing ring of the pick-and-place module are fixed on the body to cooperatively and air-tightly seal the second chamber.

    Electronic device testing apparatus with locking mechanism for pressing header and socket plate

    公开(公告)号:US20170292973A1

    公开(公告)日:2017-10-12

    申请号:US15480427

    申请日:2017-04-06

    Inventor: Chien-Ming CHEN

    Abstract: An electronic device testing apparatus with a locking mechanism for locking a press head and a socket plate is provided. When an electronic device is to be tested, a lifting arm is lowered so that a contact portion is in contact with the electronic device, and a locking mechanism is actuated to detain the press head on the socket plate. A pressing force generating device exerts a pressing force onto the electronic device and the socket plate, and at least a portion of a reaction force can be directed back to the locking mechanism. The locking mechanism is adapted to detain the press head on the socket plate. When the pressing force generating device generates a predetermined pressing force to certainly establish electrical connection between the electronic device and the chip socket, the reaction force produced by the chip socket may be distributed over the locking mechanism.

    TEST APPARATUS WITH DRY ENVIRONMENT
    6.
    发明申请
    TEST APPARATUS WITH DRY ENVIRONMENT 有权
    具有干燥环境的试验装置

    公开(公告)号:US20140182397A1

    公开(公告)日:2014-07-03

    申请号:US14108176

    申请日:2013-12-16

    CPC classification number: G01R31/2877 G01N1/42 G01R31/2865

    Abstract: A test apparatus includes a test site, a buffer carrying device, a transport carrying device, a handling mechanism and a dry air flow guide mechanism. The test site performs a test procedure on the objects. The buffer carrying device is disposed close to a side of the test site, holds the objects and performs a temperature conditioning process. The transport carrying device is disposed close to another side of the test site, moves back and forth along a transporting direction, transports the objects into and out of the test site, and heats up the objects. The handling mechanism carries the objects among the buffer carrying device, the test site and the transport carrying device. The dry air flow guide mechanism guides a dry air to surround the test site, the buffer carrying device, the transport carrying device and the handling mechanism and generates a dry environment to prevent dew condensation.

    Abstract translation: 试验装置包括试验部位,缓冲载体装置,输送装置,搬运机构以及干燥空气引导机构。 测试站点对对象执行测试程序。 缓冲载体装置靠近试验部位的一侧设置,保持物体并进行温度调节处理。 运送装置靠近试验场的另一侧,沿运送方向前后移动,运送物体进出试验场地,并加热物体。 处理机构携带缓冲运送装置,试验部位和运送装置中的物体。 干燥空气流动引导机构引导干燥空气围绕测试场所,缓冲装置,输送装置和处理机构,并产生干燥环境以防止结露。

    Method and apparatus for testing a package-on-package semiconductor device

    公开(公告)号:US20230349968A1

    公开(公告)日:2023-11-02

    申请号:US18299173

    申请日:2023-04-12

    CPC classification number: G01R31/2896 G01R31/2887 G01R31/2893

    Abstract: The present invention relates to an apparatus for testing a package-on-package semiconductor device, mainly comprising a pick-and-place device, a test socket, an upper chip holder, and a main controller. When a first package device is to be tested, the main controller controls the pick-and-place device to load the first package device into the test socket and then controls the pick-and-place device to transfer the upper chip holder and bring the upper chip holder into electrical contact with the first package device on the test socket so that a second package device in the upper chip holder is electrically connected to the first package device for testing. Accordingly, the upper chip holder is an independent component. Only when a test is executed, the pick-and-place device transfers the upper chip holder onto the test socket so that the second package device is electrically connected to the first package device.

    Apparatus For Testing A Package-On-Package Semiconductor Device
    8.
    发明申请
    Apparatus For Testing A Package-On-Package Semiconductor Device 有权
    用于测试封装封装半导体器件的器件

    公开(公告)号:US20150260793A1

    公开(公告)日:2015-09-17

    申请号:US14644552

    申请日:2015-03-11

    Inventor: Chien-Ming CHEN

    CPC classification number: G01R31/318513 G01R1/04 G01R31/2863

    Abstract: An apparatus for testing a package-on-package semiconductor device includes a top cover, a lower base, a heat dissipation module, and a plurality of probes. The lower base is disposed under the top cover so as to form an internal accommodation space for receiving an upper chip. The heat dissipation module includes a heat sink arranged in the internal accommodation space and attached to an upper surface of the upper chip. The probes are arranged in the lower base so as to electrically connect the upper chip with a lower chip. By the heat sink arranged in the internal accommodation space formed of the top cover and the lower base, heat generated from the upper chip during operation of the upper chip can be greatly dissipated so that the performance and the service life of the upper chip can be improved.

    Abstract translation: 一种用于测试封装封装半导体器件的装置,包括顶盖,下基座,散热模块和多个探针。 下基部设置在顶盖下方,以形成用于容纳上芯片的内部容纳空间。 散热模块包括布置在内部容纳空间中并连接到上部芯片的上表面的散热器。 探针布置在下基座中,以便将上芯片与下芯片电连接。 通过布置在由顶盖和下基座形成的内部容置空间中的散热器,可以大大消耗从上芯片操作期间从上芯片产生的热量,使得上芯片的性能和使用寿命可以 改进。

    TEST DEVICE FOR TESTING A POP STACKED-CHIP
    9.
    发明申请
    TEST DEVICE FOR TESTING A POP STACKED-CHIP 有权
    用于测试POP堆叠芯片的测试设备

    公开(公告)号:US20130293254A1

    公开(公告)日:2013-11-07

    申请号:US13875660

    申请日:2013-05-02

    CPC classification number: G01R31/2887 G01R31/2896

    Abstract: A test device is provided for testing a bottom chip of a package-on-package (PoP) stacked-chip. An upper surface of the bottom chip has a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip. The test device includes a test head and a plurality of test contacts. The test head has the top chip installed inside. The plurality of test contacts is installed on a lower surface of the test head and electrically connected to the plurality of corresponding soldering points of the top chip inside the test head. When the lower surface of the test head contacts the upper surface of the bottom chip, the plurality of test contacts is electrically connected to the plurality of soldering points for testing the bottom chip.

    Abstract translation: 提供了一种用于测试封装封装(PoP)堆叠芯片的底部芯片的测试设备。 底部芯片的上表面具有用于电连接PoP堆叠芯片的顶部芯片的多个对应焊接点的多个焊接点。 测试装置包括测试头和多个测试触点。 测试头内部安装了顶部芯片。 多个测试触点安装在测试头的下表面上并电连接到测试头内的顶部芯片的多个对应焊接点。 当测试头的下表面接触底部芯片的上表面时,多个测试触点电连接到多个焊接点以测试底部芯片。

    Testing system for Testing Semiconductor Package stacking Chips and Semiconductor Automatic Tester thereof
    10.
    发明申请
    Testing system for Testing Semiconductor Package stacking Chips and Semiconductor Automatic Tester thereof 有权
    半导体封装堆芯芯片和半导体自动测试仪测试系统

    公开(公告)号:US20130293252A1

    公开(公告)日:2013-11-07

    申请号:US13854372

    申请日:2013-04-01

    Inventor: Chien-Ming CHEN

    CPC classification number: G01R31/2896 G01R31/2887

    Abstract: A testing system for testing semiconductor package stacking chips is disclosed. The system includes a testing socket, a testing arm, and a testing mechanism. The testing mechanism includes a probe testing device. The probe testing device has a testing chip inside and a plurality of testing probes electrically connected to the testing chip. The plurality of testing probes extends toward the testing socket for contacting a chip-under-test loaded on the testing socket. When the testing mechanism moves to an upper position between the testing socket and the testing arm, the testing arm moves downward in the vertical direction and presses down the testing mechanism thereby coercing the plurality of testing probes in the testing mechanism to closely abut against the chip-under-test, so that the testing chip inside the testing mechanism can electrically connect to the chip-under-test for forming a test loop.

    Abstract translation: 公开了一种用于测试半导体封装堆叠芯片的测试系统。 该系统包括测试插座,测试臂和测试机构。 测试机构包括探针测试装置。 探针测试装置内部具有测试芯片,并且多个测试探针电连接到测试芯片。 多个测试探针延伸到测试插座,用于接触加载在测试插座上的芯片下测试。 当测试机构移动到测试插座和测试臂之间的上部位置时,测试臂沿垂直方向向下移动并按压测试机构,从而迫使测试机构中的多个测试探针紧紧靠在芯片上 - 测试,使测试机构内的测试芯片可以电连接到芯片下测试以形成测试回路。

Patent Agency Ranking