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    PROBE STATION
    2.
    发明公开
    PROBE STATION 审中-公开

    公开(公告)号：US20230393191A1

    公开(公告)日：2023-12-07

    申请号：US17805027

    申请日：2022-06-01

    Applicant: NANYA TECHNOLOGY CORPORATION

    Inventor： Yi-Kai CHAO

    IPC: G01R31/28

    CPC classification number: G01R31/2889 ,  G01R31/2865 ,  G01R31/2868

    Abstract: A probe station includes a frame, a platform, a testing equipment, a probe holder and at least one probe. The frame defines an accommodation space. The platform is connected with the frame. The platform has an opening. The opening is communicated with the accommodation space. The testing equipment is at least partially disposed in the accommodation space and is at least partially exposed through the opening. The probe holder is disposed on the platform. The probe is held by the probe holder. The probe holder is configured to control the probe to contact with a device under test disposed on the testing equipment through the opening.

    Method for open-loop or closed-loop control of the temperature of a chuck for a wafer, temperature adjustment device, and wafer testing system
    3.
    发明授权
    Method for open-loop or closed-loop control of the temperature of a chuck for a wafer, temperature adjustment device, and wafer testing system 有权

    公开(公告)号：US11821941B2

    公开(公告)日：2023-11-21

    申请号：US17629071

    申请日：2020-07-21

    Applicant: ATT Advanced Temperature Test Systems GmbH

    Inventor： Markus Eibl

    IPC: G01R31/28

    CPC classification number: G01R31/2874 ,  G01R31/2865

    Abstract: A method for open-loop or closed-loop control of the temperature of a chuck for a wafer includes detecting the position of a test device for testing a wafer and determining the spatial distances between the test device and a plurality of temperature measurement devices for measuring the temperature of the chuck or of a wafer supported or clamped by the chuck. The method proceeds by selecting at least one temperature measurement device from the plurality of temperature measurement devices as a reference temperature measurement device; and controlling the temperature of the chuck by open-loop or closed-loop control on the basis of the temperature(s) of the chuck or wafer as measured by the selected one or more reference temperature measurement devices.

    System and method for testing a semiconductor chip
    4.
    发明授权
    System and method for testing a semiconductor chip 有权

    公开(公告)号：US11774491B1

    公开(公告)日：2023-10-03

    申请号：US17835308

    申请日：2022-06-08

    Applicant: NANYA TECHNOLOGY CORPORATION

    Inventor： Yi-Kai Chao

    IPC: G01R31/28

    CPC classification number: G01R31/2865 ,  G01R31/2863

    Abstract: The present application provides a testing system. The testing system includes a chip socket and a probe. The chip socket includes a pedestal and a fastener. The pedestal is configured to accommodate a chip to be tested. The fastener includes a top body and a base body. The top body includes a probing window surrounded by a plurality of side walls, wherein the probing window has a first end at an outer surface of the top body and a second end at an inner surface of the top body, a first angle between a first side wall of the plurality of side walls and the outer surface is less than 90 degrees, and a first opening area at the first end of the probing window is larger than a second opening area at the second end of the probing window.

    Housing with anti-dislodge capability
    5.
    发明授权
    Housing with anti-dislodge capability 有权

    公开(公告)号：US11674998B2

    公开(公告)日：2023-06-13

    申请号：US17492347

    申请日：2021-10-01

    Applicant: Johnstech International Corporation

    Inventor： Bob Chartrand ,  David Johnson ,  Brian Sheposh ,  Mike Andres

    IPC: G01R31/28

    CPC classification number: G01R31/2887 ,  G01R31/2863 ,  G01R31/2865

    Abstract: A contactor assembly for a testing system is disclosed. The assembly includes a contact having a contact tail and a housing having a top surface and a bottom surface. A slot extends through the housing from the top surface to the bottom surface and defines a first inner side wall of the housing and a first inner end wall. The contact is receivable in the slot. The contact tail includes a sloped terminus. A retainer is disposed on the first inner side wall. When the sloped terminus is engaged with the first inner end wall, at least a portion of the retainer overlaps with the contact forming at an overlapping area in a cross-sectional view, thereby preventing removal of the contact from the top side of the housing.

    Apparatus and Methods for Testing Semiconductor Devices
    6.
    发明申请
    Apparatus and Methods for Testing Semiconductor Devices 审中-公开

    公开(公告)号：US20180197762A1

    公开(公告)日：2018-07-12

    申请号：US15864778

    申请日：2018-01-08

    Applicant: Christian O. Cojocneanu ,  Lucian Scurtu

    Inventor： Christian O. Cojocneanu ,  Lucian Scurtu

    IPC: H01L21/67 ,  H01L21/66 ,  H01L21/68 ,  H01L21/677 ,  G01R31/26

    CPC classification number: H01L21/67288 ,  G01R31/2601 ,  G01R31/2865 ,  G01R31/2867 ,  G01R31/2868 ,  H01L21/67742 ,  H01L21/68 ,  H01L22/30

    Abstract: The invention is a cost effective multisite parallel wafer tester that has an array of stationary wafer test sites; a single mobile wafer handling and alignment carriage that holds a wafer handling robot, a wafer rotation pre-alignment assembly, a wafer alignment assembly, a wafer front opening unified pod (FOUP), and a wafer camera assembly; and a robot that moves the wafer handling and alignment carriage to and from each test site. Each test site contains a wafer probe card assembly and a floating chuck. In use, wafers are loaded from a front opening FOUP into a wafer buffer FOUP from which wafers are retrieved by the wafer handling and alignment assembly. The robot positions the wafer handling and alignment carriage and the associated wafer handling robot, the wafer rotation pre-alignment assembly, the wafer alignment assembly, the wafer FOUP, and the wafer camera assembly in front of and inside a given test site and aligns the wafer to be tested with the probe card inside the test site using the floating chuck.

    IC DEVICE-IN-POCKET DETECTION WITH ANGULAR MOUNTED LASERS AND A CAMERA
    7.
    发明申请
    IC DEVICE-IN-POCKET DETECTION WITH ANGULAR MOUNTED LASERS AND A CAMERA 审中-公开
    具有角度安装的激光和摄像机的IC器件内部检测

    公开(公告)号：US20170045577A1

    公开(公告)日：2017-02-16

    申请号：US15232243

    申请日：2016-08-09

    Applicant: Delta Design, Inc.

    Inventor： Kexiang Ken DING ,  Chris DO ,  James FRANDSEN

    IPC: G01R31/28 ,  G01B11/27

    CPC classification number: G01R31/2891 ,  G01B11/272 ,  G01R31/2865 ,  G01S17/46

    Abstract: An apparatus includes a device holder including a device placement area configured to hold an electronic device, and a shoulder extending peripherally around the device placement area; a laser line generator configured to generate a laser line that includes (i) a device placement area laser line portion, and (ii) a shoulder area laser line portion; a camera configured to obtain an image of at least the laser line; and a processor configured to: receive the image from the camera, determine (i) an angle of the device placement area laser line portion, and/or (ii) an offset between the location of the device placement area laser line portion and the location of the shoulder area laser line portion, and determine whether an electronic device is positioned in the device placement area or positioned incorrectly in the device holder.

    Abstract translation: 一种设备包括：设备保持器，其包括被配置为保持电子设备的设备放置区域和在设备放置区域周围延伸的肩部; 激光线发生器，被配置为产生包括（i）设备放置区域激光线部分和（ii）肩部区域激光线部分的激光线; 配置为获得至少所述激光线的图像的照相机; 以及处理器，被配置为：从相机接收图像，确定（i）设备放置区域激光线部分的角度，和/或（ii）设备放置区域激光线部分的位置与位置之间的偏移 并且确定电子设备是否位于设备放置区域中或者不正确地定位在设备保持器中。

    Detection and mitigation of burn-in for thermal imaging systems
    8.
    发明授权
    Detection and mitigation of burn-in for thermal imaging systems 有权
    检测和减轻热成像系统的老化

    公开(公告)号：US09102776B1

    公开(公告)日：2015-08-11

    申请号：US13411996

    申请日：2012-03-05

    Applicant: Joseph Kostrzewa ,  Leonard Araki ,  Russell D. Grannemann

    Inventor： Joseph Kostrzewa ,  Leonard Araki ,  Russell D. Grannemann

    IPC: C08F265/04 ,  G01R31/28

    CPC classification number: C08F265/04 ,  B41M2205/06 ,  G01J5/026 ,  G01J5/027 ,  G01J2005/202 ,  G01R31/2865 ,  H04N5/23206 ,  H04N5/23245 ,  H04N5/33

    Abstract: Various techniques are disclosed to detect and mitigate the effects of burn-in events occurring in thermal imaging systems. Such events may be attributable to the sun (e.g., solar burn-in) and/or other high thermal energy sources. In one example, a method includes detecting a burn-in event that causes thermal images captured by a focal plane array (FPA) to exhibit a blemish; and mitigating the blemish in the thermal images. In another example, a thermal imaging system includes a focal plane array (FPA) adapted to capture thermal images; and a processor adapted to: detect a burn-in event that causes the thermal images to exhibit a blemish, and mitigate the blemish in the thermal images.

    Abstract translation: 公开了各种技术来检测和减轻在热成像系统中发生的老化事件的影响。 这种事件可能归因于太阳（例如，太阳能老化）和/或其他高热能源。 在一个示例中，一种方法包括检测使由焦平面阵列（FPA）捕获的热图像呈现瑕疵的老化事件; 并减轻热图像中的瑕疵。 在另一示例中，热成像系统包括适于捕获热图像的焦平面阵列（FPA）; 以及适于：检测导致热图像显示瑕疵的老化事件并减轻热图像中的瑕疵的处理器。

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