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公开(公告)号：US11487169B2
公开(公告)日：2022-11-01
申请号：US17281586
申请日：2020-12-24
Inventor： Xu Xu , Shanshan Xu , Wenchao Wang , Xin Fang
IPC: G02F1/1345
Abstract: A substrate and a display panel are provided, which relate to the technical field of display apparatus. The substrate includes an active area and a bonding area located outside the active area and close to an edge of the substrate, wherein a bonding electrode is disposed within the bonding area, a first lead extending toward the edge of the substrate is connected to one side of the bonding electrode toward the edge of the substrate, and the first lead includes a curved section close to the bonding electrode and a straight section close to the edge of the substrate.
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2.发明授权公开(公告)号：US12131495B2
公开(公告)日：2024-10-29
申请号：US17486580
申请日：2021-09-27
Inventor： Xu Xu , Biqiang Huang , Shanshan Xu , Wenchao Wang , Jixiang Chen , Longgan Hu
CPC classification number: G06T7/60 , H10K50/865 , H10K71/00 , H10K71/70 , G02F1/1309
Abstract: An initial display substrate comprising a product region and a to-be-processed region on periphery of the product region, the to-be-processed region comprising to-be-processed rounded corner regions at corners of the initial display substrate, each corner comprising major corner sides whose extension directions intersect, at least one to-be-processed rounded corner region comprising first positioning sub-region and two second positioning sub-regions, the major corner sides respectively defining edges of the second positioning sub-regions, the first positioning sub-region being between the second positioning sub-regions; first shielding blocks in the first positioning sub-region, each having arc shape protruding towards direction away from the product region, and the first shielding blocks being arranged in parallel at intervals; and second shielding blocks in each second positioning sub-region, the second shielding blocks being arranged in periodic pattern different from pattern of shielding blocks in a region of the to-be-processed region other than the to-be-processed rounded corner regions.
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公开(公告)号：US11515336B2
公开(公告)日：2022-11-29
申请号：US16640186
申请日：2019-04-23
Inventor： Shanshan Xu , Wenchao Wang , Xu Xu , Baoqiang Wang
IPC: H01L27/12 , H01L21/768 , G02F1/1362 , H01L27/32
Abstract: An array substrate, a display device, and a method for repairing a broken wire of an array substrate are disclosed. The array substrate includes a substrate, a plurality of sub-pixel units on the substrate, and a wire and a first conductive light-blocking pattern between two adjacent sub-pixel units of the plurality of sub-pixel units. The first conductive light-blocking pattern is electrically insulated from the wire, and the first conductive light-blocking pattern includes two first regions. Orthographic projections of the two first regions on the substrate overlap with an orthographic projection of the wire on the substrate.
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公开(公告)号：US11782320B2
公开(公告)日：2023-10-10
申请号：US17512540
申请日：2021-10-27
Inventor： Jixiang Chen , Wenchao Wang , Jinliang Wang , Shanshan Xu , Xu Xu , Xin Fang
IPC: G02F1/1362
CPC classification number: G02F1/136286 , G02F1/136204
Abstract: The present disclosure provides a display substrate, a compensation method and a display substrate. The non-display area includes a first fan-out area and a second fan-out area arranged at two opposite sides of the display area along a first direction respectively. The display substrate further includes a plurality of data lines extending along the first direction, each data line includes a first portion, a second portion and a third portion, at least part of the first portion is arranged in the display area, the second portion is arranged in the first fan-out area, the third portion is arranged in the second fan-out area, and the data lines have a substantially same resistance.
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Patent Agency Ranking
公开(公告)号：US12282241B2
公开(公告)日：2025-04-22
申请号：US18564104
申请日：2021-05-28
Inventor： Wenli Fan , Tao Fang , Meiying Li , Zecun Zeng , Liqing Yao , Xin Fang , Shanshan Xu , Wenchao Wang , Sang Jin Park , Baoqiang Wang , Kai Diao
IPC: G02F1/1368 , G02F1/1343 , G02F1/1362
Abstract: The display panel comprises: a plurality of pixels arranged in an array. Each pixel comprises a plurality of subpixels. The plurality of pixels arranged in an array comprise: a plurality of pixel rows. Each pixel row comprises a plurality of subpixels arranged in a first direction. The plurality of pixel rows extend in a second direction. The first direction intersects with the second direction. The display panel comprises: a first array substrate and a first opposing substrate arranged opposite to each other, and a first liquid crystal layer located between the first array substrate and the first opposing substrate. The first array substrate comprises: a plurality of first driving transistors arranged in an array. At least one pixel is arranged between two adjacent first driving transistors in the first direction. The first opposing substrate comprises: a plurality of light shielding portions in one-to-one correspondence to the first driving transistors.
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公开(公告)号：US11567358B2
公开(公告)日：2023-01-31
申请号：US17355511
申请日：2021-06-23
Inventor： Xin Fang , Jixiang Chen , Shanshan Xu , Longgan Hu , Wenchao Wang , Jinliang Wang , Sang Jin Park
IPC: G02F1/1335
Abstract: Provided are a color film substrate and manufacturing method thereof, and a display panel and manufacturing method thereof. The color film substrate is divided into a display region, and a non-display region around a periphery of the display region and including an edge region at an edge of the color film substrate. The color film substrate includes base, color resist layer on the base and black matrix layer on the base at least in the display region. In the edge region, the color resist layer includes first sub color resist layer on the base and second sub color resist layer on the first sub color resist layer, the first sub color resist layer allows light in first wavelength range to transmit therethrough, the second sub color resist layer allows light in a second wavelength range to transmit therethrough, and the first wavelength range does not overlap the second wavelength range.
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公开(公告)号：US20240386835A1
公开(公告)日：2024-11-21
申请号：US18271080
申请日：2022-08-19
Inventor： Xinmao Qiu , Tingting Tu , Shanshan Xu , Yao Liu , Zuwen Liu , Zongxiang Li , Hao Cheng , Yawen Huang , Jiantao Lin , Jingguang Zhu , Jin Wang , Changhong Shi , Yaochao Lv , Wenchang Tao
IPC: G09G3/20
Abstract: The present disclosure provides an array substrate, a display panel and a display device, relating to the field of display technologies. The array substrate includes a display area and a peripheral area located at a side of the display area; the peripheral area includes a plurality of first signal line groups, and each of the first signal line groups includes two clock signal lines extending in a same direction; signals transmitted in the clock signal lines are square wave signals, a phase of a clock signal transmitted by one of the clock signal lines in each of the first signal line groups is opposite to a phase of a clock signal transmitted by the other clock signal line in the same first signal line group, and the two clock signal lines in the same first signal line group are arranged to be adjacent to each other.
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公开(公告)号：US11631362B2
公开(公告)日：2023-04-18
申请号：US17535127
申请日：2021-11-24
Applicant: BOE Technology Group Co., Ltd.
Inventor： Shuilang Dong , Shanshan Xu , Guangcai Yuan , Zhanfeng Cao , Ce Ning , Lizhong Wang , Dapeng Xue , Nianqi Yao
IPC: G09G3/3266 , G09G3/20 , G11C19/28
Abstract: A shift register unit includes an input sub-circuit, a pull-down node driving sub-circuit and an output sub-circuit. The pull-down node driving sub-circuit includes a first connection unit, a first voltage-reduction unit and a second connection unit, and configured to: under the control of the first voltage signal terminal and the pull-up node, transmit a first voltage signal from the first voltage signal terminal to the first pull-down node via the first connection unit, and reduce a voltage applied to the second connection unit via the first voltage-reduction unit; and transmit a second voltage signal from the second voltage signal terminal to the first pull-down node via the second connection unit under the control of the pull-up node.
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公开(公告)号：US20220171244A1
公开(公告)日：2022-06-02
申请号：US17488499
申请日：2021-09-29
Inventor： Shanshan Xu , Xu Xu , Wenli Fan , Jianfu Pan , Xin Fang
IPC: G02F1/1362 , G02F1/1343 , G02F1/1368 , H01L27/12
Abstract: The present disclosure provides an array substrate, a display panel, and a display device. The array substrate includes a substrate, pixel units arranged in rows and columns on the substrate, and data lines between at least some columns of pixel units. Two columns of pixel units are disposed between two adjacent data lines. Each of the pixel units includes a first electrode including a planar electrode and a second electrode including a slit electrode having at least one slit, sequentially disposed on the substrate. The slit electrode of each of the pixel units has a first side proximal to a data line nearest to the slit electrode and a second side distal to the data line nearest to the slit electrode, opposite to each other in a row direction. The slit electrode of at least one of the pixel units includes at least one opening on the first side.
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