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公开(公告)号:US20240265843A1
公开(公告)日:2024-08-08
申请号:US18022479
申请日:2022-03-14
Applicant: BOE Technology Group Co., Ltd.
Inventor: Weixing LIU , Jintao PENG , Jiao LI , Chunfang ZHANG , Xinxing WANG
IPC: G09G3/20 , G09G3/3266 , G11C19/28
CPC classification number: G09G3/2092 , G09G3/3266 , G09G2310/0232 , G09G2310/0267 , G09G2310/0286 , G09G2330/021 , G11C19/28
Abstract: Provided is a shift register unit. The shift register unit includes: a first input circuit, connected to a first control terminal, a turn-on signal terminal, a first node and a second node; a second input circuit, connected to a first power supply terminal, the first node and a third node; an output control circuit, connected to the first node, the second node, the third node, a second control terminal and a fourth node; and an output circuit, connected to the second node, the fourth node, the first power supply terminal, a second power supply terminal, a first output terminal and a second output terminal.
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公开(公告)号:US20240222570A1
公开(公告)日:2024-07-04
申请号:US17920811
申请日:2021-11-30
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yanan NIU , Yan QU , Ming YANG , Jintao PENG , Bin QIN , Wanzhi CHEN
IPC: H01L33/48 , H01L25/075 , H01L33/20 , H01L33/54 , H01L33/62
CPC classification number: H01L33/486 , H01L25/0753 , H01L33/20 , H01L33/54 , H01L33/62 , H01L2933/0066
Abstract: A light emitting substrate, a preparation method therefor, and a display device are provided. The light emitting substrate includes a base substrate, a die bonding structure, a light shielding structure and a light emitting chip disposed on the base substrate, wherein the light emitting chip is disposed at a side of the die bonding structure away from the base substrate, the light shielding structure is located at a peripheral side of the light emitting chip, the light emitting substrate further comprises a flux functional layer covering the side of the die bonding structure away from the base substrate, the light shielding structure comprises a shielding material layer and a partition structure, and the flux functional layer is blocked at the partition structure.
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公开(公告)号:US20230111185A1
公开(公告)日:2023-04-13
申请号:US17769937
申请日:2021-05-21
Applicant: BOE Technology Group Co., Ltd.
Inventor: Shuang SUN , Fangzhen ZHANG , Jing NIU , Yanan NIU , Jintao PENG , Lubin SHI
IPC: H10K59/121 , H01L27/12 , H10K59/131
Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a pixel circuit, and the pixel circuit includes a light-emitting element, a driving circuit and a capacitor circuit. The driving circuit is configured to drive the light-emitting element to emit light; a first terminal of the capacitor circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the capacitor circuit is electrically connected to a data writing-in node; the capacitor circuit includes at least two capacitors connected in parallel with each other.
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公开(公告)号:US20240428747A1
公开(公告)日:2024-12-26
申请号:US18294153
申请日:2023-02-28
Applicant: BOE Technology Group Co., Ltd.
Inventor: Meirong LU , Weixing LIU , Chunfang ZHANG , Wanpeng TENG , Kai GUO , Zhiqiang XU , Jintao PENG
IPC: G09G3/34
Abstract: Embodiments of the present disclosure provide a display device and a driving method. The display device includes a display panel that includes a plurality of pixels, each of the plurality of pixels includes a pixel electrode, wherein the pixel electrode includes a plurality of pixel sub-electrodes spaced from each other; and a drive circuit configured to load a first drive voltage with different maintaining durations to at least part of a plurality of pixel sub-electrodes in a set pixel through a signal output terminal in a picture display stage, so that the set pixel is switched from a first state to a second state; wherein the set pixel is at least one of the plurality of pixels.
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公开(公告)号:US20230206832A1
公开(公告)日:2023-06-29
申请号:US16486201
申请日:2019-01-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xueling GAO , Chengchung YANG , Tieshi WANG , Jintao PENG
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0852 , G09G2300/0819 , G09G2310/08 , G09G2300/0426 , G09G2320/0233 , G09G2320/045 , G09G2320/041 , G09G2330/028
Abstract: A pixel circuit, a display panel, a display apparatus and a driving method. The pixel circuit includes a data signal writing module, a driving module, a threshold compensation transistor, a first power voltage writing module and a light-emitting module, wherein the driving module includes a driving transistor.
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公开(公告)号:US20210225877A1
公开(公告)日:2021-07-22
申请号:US16772272
申请日:2019-12-19
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yanan NIU , Kuanjun PENG , Jiushi WANG , Zhanfeng CAO , Feng ZHANG , Qi YAO , Wusheng LI , Feng GUAN , Lei CHEN , Jintao PENG , Tingting ZHOU
IPC: H01L27/12
Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. In the display substrate of the present disclosure, a first transistor comprises a first gate electrode, a first electrode, a second electrode, and a first active layer; and a second transistor comprises a second gate electrode, a third electrode, a fourth electrode, and a second active layers, wherein the first active layer comprises a silicon material, the second active layer comprises an oxide semiconductor material, and wherein the third electrode and the first gate electrode are disposed in the same layer, and the fourth electrode and the first electrode, the second electrodes are disposed in the same layer.
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公开(公告)号:US20240372050A1
公开(公告)日:2024-11-07
申请号:US18774927
申请日:2024-07-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Kai GUO , Weixing LIU , Yuwei YAN , Meirong LU , Zhiqiang XU , Chunfang ZHANG , Wanpeng TENG , Jintao PENG , Xinxing WANG
IPC: H01L33/58 , H01L25/075 , H01L33/00 , H01L33/50 , H01L33/62
Abstract: A display panel includes a driving backplane, an optical device layer, an adhesive layer and an optical conversion layer. The optical device layer includes optical devices each including a buffer layer and at least one light emitting unit. The buffer layer includes a first surface and a second surface. The first surface is farther away from the driving backplane than the second surface. The light-emitting unit is located on a side of the second surface away from the first surface. A buffer layer of at least one optical device further includes a side surface for connecting a first surface and a second surface. The side surface intersects with the first surface to form a first acute angle, and the side surface intersects with the second surface to form a first obtuse angle. A refractive index of the adhesive layer is less than a refractive index of the buffer layer.
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公开(公告)号:US20240371323A1
公开(公告)日:2024-11-07
申请号:US18247634
申请日:2022-06-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Weixing LIU , Zhiqiang XU , Jintao PENG , Chunfang ZHANG , Wanpeng TENG , Kai GUO , Jiao LI
IPC: G09G3/3233 , G09G3/20
Abstract: A pixel circuit includes a light emitting element, a first energy storage circuit, a first driving circuit, a second driving circuit, a first driving control circuit, a second driving control circuit, a second energy storage circuit and a first control data voltage writing-in circuit; the first control data voltage writing-in circuit controls to write a first control data voltage into the third node under the control of a first writing-in control signal; both the first terminal of the first driving circuit and the first terminal of the second driving circuit are electrically connected to a power supply voltage terminal, the first driving circuit is used to drive the light emitting element under the control of a potential of the control terminal thereof, and the second driving circuit is used to drive the light emitting element under the control of a potential of the control terminal thereof.
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公开(公告)号:US20240282265A1
公开(公告)日:2024-08-22
申请号:US18044065
申请日:2022-06-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Weixing LIU , Xinxing WANG , Jintao PENG , Zhiqiang XU , Chunfang ZHANG
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G2300/0842 , G09G2310/061 , G09G2310/08
Abstract: A pixel circuit includes a light emitting element, a first driving circuit, a second driving circuit, a first control circuit, a setting circuit, a first energy storage circuit, a second control circuit and a control data voltage writing-in circuit. The first control circuit controls to connect or disconnect the control end of the first driving circuit and the control end of the second driving circuit under the control of the potential of the first node. The second control circuit provides the second setting voltage to the control end of the first driving circuit, and connects or disconnects the control end of the first driving circuit and the connection node under the control of the control signal provided by the charging control end; the control data voltage writing-in circuit writes the control data voltage into the first node under the control of the first writing-in control signal.
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公开(公告)号:US20230013848A1
公开(公告)日:2023-01-19
申请号:US17783207
申请日:2021-05-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lubin SHI , Wanpeng TENG , Liang CHEN , Bin QIN , Ke WANG , Jintao PENG , Fangzhen ZHANG , Kuanjun PENG
IPC: H01L27/32
Abstract: A display panel has a display region and a fan-out lead region, the fan-out lead region is located within the display region. The display panel comprises a base, a pixel circuit layer, a plurality of fan-out leads disposed between the base and the pixel circuit layer and located in the fan-out lead region, and an electrical field shielding pattern disposed between the pixel circuit layer and a film layer in which the plurality of fan-out leads are located. The pixel circuit layer includes a plurality of pixel circuits, at least one pixel circuit is located in the fan-out lead region. At least one fan-out lead is electrically connected to the pixel circuits. Orthographic projection of active layer patterns of transistors of the pixel circuit located in the fan-out lead region on the base are located within an orthographic projection of the electric field shielding pattern on the base.
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