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公开(公告)号：US20250008794A1
公开(公告)日：2025-01-02
申请号：US18704476
申请日：2023-05-11
Inventor： Bangqing XIAO , Meng LI , Benlian WANG , Qiwei WANG , Hai ZHENG
IPC: H10K59/131 , H10K59/35 , H10K59/90
Abstract: A display substrate, comprising a substrate, a circuit structure layer, a light-emitting structure layer and multiple conductive layers. The circuit structure layer is arranged on one side of the substrate and comprises multiple first pixel circuits located in the second display region. The light-emitting structure layer is arranged on the side of the circuit structure layer away from the substrate, and comprises multiple first light-emitting elements in the first display region. The multiple conductive layers are arranged between the circuit structure layer and the light-emitting structure layer, and comprise multiple conductive wires. The multiple conductive wires of the at least one conductive layer comprise multiple first conductive wires and multiple second conductive wires. The first conductive wires extend in a first direction, and each of the second conductive wires at least comprises first parts extending in the first direction and second parts extending in a second direction.
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公开(公告)号：US20240381708A1
公开(公告)日：2024-11-14
申请号：US18032810
申请日：2022-05-12
Inventor： Jiaxing CHEN , Yue LONG , Lili DU , Jie LI , Yi ZHANG , Tinghua SHANG , De LI , Biao LIU , Yixuan LONG , Zuoji NIU , Jiangtao DENG , Xiaoyan YANG , Xiping LI , Meng LI , Du CHEN
IPC: H10K59/131 , H10K59/121
Abstract: Disclosed is a display substrate, including a base substrate (100), a circuit structure layer disposed on the base substrate (100), and a light emitting structure layer. The circuit structure layer includes a plurality of pixel circuits located in a first display region (A1), at least one first trace 231 extending along a first direction (D1), at least one second trace 232 extending along a second direction (D2), and at least one third trace located in a peripheral region (BB). The at least one first trace (231) is electrically connected with the at least one second trace (232) and the at least one third trace is electrically connected with at least one of following; the at least one first trace (231) and the at least one second trace (232).
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公开(公告)号：US20240312416A1
公开(公告)日：2024-09-19
申请号：US18028458
申请日：2022-06-29
Inventor： Tianyi CHENG , Meng LI , Zhongliu YANG
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G2300/0842 , G09G2310/08 , G09G2320/0247
Abstract: A pixel circuit, a driving method and a display device. The pixel circuit includes a light emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display period of the pixel circuit includes a refresh frame and a retention frame; the refresh frame and the retention frame respectively include a set phase and a light emitting phase set successively; the initialization circuit is configured to control provide the initial voltage to the first terminal and/or the second terminal of the driving circuit under the control of the initial control signal provided by the initial control terminal, in the refresh frame and the retention frame, at least in the set phase. The present disclose improves hysteresis and improves the display effect.
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公开(公告)号：US20240213261A1
公开(公告)日：2024-06-27
申请号：US17912121
申请日：2021-06-10
Inventor： Feng WEI , Binyan WANG , Tianyi CHENG , Meng LI
IPC: H01L27/12 , G09G3/3233 , H10K59/121 , H10K59/131
CPC classification number: H01L27/124 , G09G3/3233 , H01L27/1225 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , H10K59/1213 , H10K59/131
Abstract: A display panel includes a pixel driving circuit, where the pixel driving circuit includes a driving transistor (T3) and a first transistor (T1), a first electrode of the first transistor (T1) is connected to a gate of the driving transistor (T3), a second electrode thereof is connected to a first initial signal line (Vinit1), the driving transistor (T3) is a P-type low temperature polysilicon transistor, and the first transistor (T1) is an N-type oxide transistor. The display panel further includes: a base substrate, a second conductive layer, a second active layer, a third conductive layer, and a fourth conductive layer.
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公开(公告)号：US20240203330A1
公开(公告)日：2024-06-20
申请号：US18592002
申请日：2024-02-29
Inventor： Cong LIU , Binyan WANG , Tianyi CHENG , Feng WEI , Meng LI , Shiqian DAI , Kaipeng SUN
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286
Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. In the display substrate, each signal line includes a first conductive portion; for at least one signal line, the display substrate includes a multi-layer insulating pattern on a side of the first conductive portion away from the base substrate; a first insulating pattern in the multi-layer insulating pattern includes a hollow, and an orthographic projection of the hollow on the base substrate is at least partially in a region surrounded by an orthographic projection of the first conductive portion on the base substrate; and for at least one clock signal line included in the at least one signal line, a ratio between a size of the hollow in a first direction and a size of a shift register unit in the first direction ranges from ¾ to 1.
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Patent Agency Ranking
公开(公告)号：US20240112639A1
公开(公告)日：2024-04-04
申请号：US18538715
申请日：2023-12-13
Inventor： Chao ZENG , Weiyun HUANG , Yue LONG , Yao HUANG , Meng LI
IPC: G09G3/3266 , G11C19/28
CPC classification number: G09G3/3266 , G11C19/28 , G09G2300/0426 , G09G2310/0286
Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a gate driving circuit, power lines, a first signal line group, and a second signal line group. The gate driving circuit includes cascaded shift register units; the power lines are configured to provide power signals to the shift register units; the first signal line group includes at least one clock signal line, and the clock signal line is configured to provide a clock signal to the shift register units; the second signal line group includes a trigger signal line, and the trigger signal line is configured to provide a trigger signal to a first-stage shift register unit; and the gate driving circuit includes at least one transistor, and an extending direction of a channel of the transistor is parallel to an extending direction of the clock signal line.
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公开(公告)号：US20240078977A1
公开(公告)日：2024-03-07
申请号：US17781870
申请日：2021-07-23
Inventor： Binyan WANG , Cong LIU , Tianyi CHENG , Feng WEI , Meng LI , Shiqian DAI , Kaipeng SUN , Lina WANG
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G09G2310/08
Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes a base substrate including a display region and a peripheral region located on at least one side of the display region, and a first gate drive circuit, the first gate drive circuit includes a first clock signal line, a second clock signal line and N shift register units that are cascaded; each shift register unit of the N shift register units includes a first output circuit; the first output circuit includes the first output transistor, the orthographic projection of the second clock signal line on the base substrate is located between an orthographic projection of the first output transistor on the base substrate and the orthographic projection of the first clock signal line on the base substrate. The display substrate can reduce load of the first clock signal line and the second clock signal line.
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公开(公告)号：US20220383820A1
公开(公告)日：2022-12-01
申请号：US16957984
申请日：2019-08-21
Inventor： Chao ZENG , Weiyun HUANG , Yue LONG , Yao HUANG , Meng LI
IPC: G09G3/3266 , G11C19/28
Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a gate driving circuit, power lines, a first signal line group, and a second signal line group. The gate driving circuit includes cascaded shift register units; the power lines are configured to provide power signals to the shift register units; the first signal line group includes at least one clock signal line, and the clock signal line is configured to provide a clock signal to the shift register units; the second signal line group includes a trigger signal line, and the trigger signal line is configured to provide a trigger signal to a first-stage shift register unit; and the gate driving circuit includes at least one transistor, and an extending direction of a channel of the transistor is parallel to an extending direction of the one clock signal line.
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公开(公告)号：US20220317848A1
公开(公告)日：2022-10-06
申请号：US17298033
申请日：2020-09-07
Inventor： Meng LI , Chao ZENG , Weiyun HUANG
Abstract: A touch panel, preparation method thereof and display apparatus. The touch panel includes a touch region and a binding region, wherein the touch region includes n touch sub-regions disposed sequentially along a second direction, and at least one touch sub-region includes multiple touch electrodes and multiple touch traces; the binding region includes a trace lead-out region adjacent to the touch region, and the trace lead-out region includes n lead convergence regions disposed sequentially along the second direction; first ends of multiple touch traces in an i-th touch sub-region are connected respectively to multiple touch electrodes in the i-th touch sub-region, and second ends of the multiple touch traces in the i-th touch sub-region extend to an i-th lead convergence region of the trace lead-out region; n is a positive integer greater than 2, i=1, 2, . . . , n, and the second direction crosses the first direction.
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公开(公告)号：US20210407351A1
公开(公告)日：2021-12-30
申请号：US16765317
申请日：2019-07-01
Inventor： Yao HUANG , Weiyun HUANG , Yue LONG , Chao ZENG , Meng LI
Abstract: A display panel and a display drive method thereof, and a display device are provided. The display panel includes a plurality of display regions and a plurality of scan drive circuits, the plurality of display regions includes a first display region and a second display region that are parallel to each other and do not overlap with each other, and the plurality of scan drive circuits includes a first scan drive circuit and a second scan drive circuit, the first and second display regions are connected to the first and second scan drive circuits to respectively receive a first light-emitting control signal, and the display drive method includes: individually adjusting a pulse width of at least one of the first light-emitting control signal and the second light-emitting control signal to adjust the light-emitting durations of light-emitting elements of the first and second display regions within one display period, respectively.
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