公开(公告)号：US11651719B2

公开(公告)日：2023-05-16

申请号：US17376131

申请日：2021-07-14

Applicant: Apple Inc.

Inventor： John T. Wetherell ,  Mahdi Farrokh Baroughi ,  Jaeyoung Kang ,  Shingo Hatanaka ,  Hasan Akyol ,  Hopil Bae

IPC: G09G3/20

CPC classification number: G09G3/2007 ,  G09G2320/0257 ,  G09G2320/0271 ,  G09G2320/0673 ,  G09G2330/021

Abstract: An electronic device may include an electronic display panel having multiple display pixels for displaying an image based on analog voltage signals. The electronic device may also include interpolation circuitry to generate the analog voltage signals based on digital image data corresponding to the image. The interpolation circuitry may also receive analog reference voltages and interpolate between sets of the analog reference voltages to generate intermediate voltages, which may be a part of the analog voltage signals. Interpolating between the sets analog reference voltages may include performing a first level interpolation of a first set of the analog reference voltages to generate a first intermediate voltage and performing a second level interpolation of a second set of the analog reference voltages to generate a second intermediate voltage, wherein the first level interpolation is different from the second level interpolation.

公开(公告)号：US20220101772A1

公开(公告)日：2022-03-31

申请号：US17376131

申请日：2021-07-14

Applicant: Apple Inc.

Inventor： John T. Wetherell ,  Mahdi Farrokh Baroughi ,  Jaeyoung Kang ,  Shingo Hatanaka ,  Hasan Akyol ,  Hopil Bae

IPC: G09G3/20

Abstract: An electronic device may include an electronic display panel having multiple display pixels for displaying an image based on analog voltage signals. The electronic device may also include interpolation circuitry to generate the analog voltage signals based on digital image data corresponding to the image. The interpolation circuitry may also receive analog reference voltages and interpolate between sets of the analog reference voltages to generate intermediate voltages, which may be a part of the analog voltage signals. Interpolating between the sets analog reference voltages may include performing a first level interpolation of a first set of the analog reference voltages to generate a first intermediate voltage and performing a second level interpolation of a second set of the analog reference voltages to generate a second intermediate voltage, wherein the first level interpolation is different from the second level interpolation.

公开(公告)号：US11176888B2

公开(公告)日：2021-11-16

申请号：US16905895

申请日：2020-06-18

Applicant: Apple Inc.

Inventor： Shingo Hatanaka ,  Derek Keith Shaeffer ,  John T. Wetherell ,  Nobutaka Shimamura ,  Yuichi Okuda ,  Jaeyoung Kang

IPC: G09G3/3258 ,  H03F3/30

Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

公开(公告)号：US12027120B2

公开(公告)日：2024-07-02

申请号：US17889231

申请日：2022-08-16

Applicant: Apple Inc.

Inventor： Jaeyoung Kang ,  Baris Cagdaser ,  Yaser Azizi

IPC: G09G3/3233 ,  G06F3/041

CPC classification number: G09G3/3233 ,  G06F3/04164 ,  G09G2310/0262

Abstract: Circuits, systems, methods, and devices are provided for isolating the first ground domain from the second ground domain while transmitting and receiving data between the two ground domains. The proposed high-voltage ground-isolating level shifter may be formed by AC coupling capacitors and a memory cell. The circuit under the high voltage ground domain may be located in an engineered high-voltage isolation well with a relatively large breakdown voltage.

公开(公告)号：US20230087831A1

公开(公告)日：2023-03-23

申请号：US17889231

申请日：2022-08-16

Applicant: Apple Inc.

Inventor： Jaeyoung Kang ,  Baris Cagdaser ,  Yaser Azizi

IPC: G09G3/3233 ,  G06F3/041

Abstract: Circuits, systems, methods, and devices are provided for isolating the first ground domain from the second ground domain while transmitting and receiving data between the two ground domains. The proposed high-voltage ground-isolating level shifter may be formed by AC coupling capacitors and a memory cell. The circuit under the high voltage ground domain may be located in an engineered high-voltage isolation well with a relatively large breakdown voltage.

公开(公告)号：US20210056930A1

公开(公告)日：2021-02-25

申请号：US16928882

申请日：2020-07-14

Applicant: Apple Inc.

Inventor： Jaeyoung Kang ,  Jesse Aaron Richmond ,  Mahdi Farrokh Baroughi ,  Hopil Bae ,  John T. Wetherell ,  Kingsuk Brahma ,  Yuichi Okuda ,  Shingo Hatanaka ,  Baris Cagdaser ,  Myungjoon Choi ,  Jie Won Ryu ,  Hyunwoo Nho ,  Yafei Bi ,  Wei H. Yao ,  Henry C. Jen ,  Derek Keith Shaeffer

IPC: G09G5/10 ,  G09G3/20

Abstract: An electronic device may include an electronic display having multiple display pixels. The display pixels may illuminate at a target luminance based at least in part on a first analog voltage signal. The electronic device may also include an electrical bus configured to generate multiple analog voltage signals including the first analog voltage signal, which is output on an output of the electrical bus. The electrical bus may include a digital to analog converter to generate at least some of the analog voltage signals and multiple output buffers to buffer the analog voltage signals. The outputs may be buffered by an output buffer of the output buffers.

公开(公告)号：US20210056904A1

公开(公告)日：2021-02-25

申请号：US16905895

申请日：2020-06-18

Applicant: Apple Inc.

Inventor： Shingo Hatanaka ,  Derek Keith Shaeffer ,  John T. Wetherell ,  Nobutaka Shimamura ,  Yuichi Okuda ,  Jaeyoung Kang

IPC: G09G3/3258 ,  H03F3/30

Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.