公开(公告)号：US20150206756A1

公开(公告)日：2015-07-23

申请号：US14553842

申请日：2014-11-25

Applicant: Applied Materials, Inc.

Inventor： Srinivas GANDIKOTA ,  Zhendong LIU ,  Jianxin LEI ,  Rajkumar JAKKARAJU

IPC: H01L21/28 ,  H01L21/285

CPC classification number: H01L21/28273 ,  H01L21/28061 ,  H01L21/285 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/76889 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/66477 ,  H01L29/78

Abstract: Semiconductor devices, methods and apparatus for forming the same are provided. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal silicon nitride film layer on the conductive film layer, and a tungsten film layer on the refractory metal silicon nitride film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal silicon nitride film layer on the conductive film layer and depositing a tungsten film layer on the refractory metal silicon nitride film layer.

Abstract translation: 提供了用于形成半导体器件的方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化硅膜层和难熔金属氮化硅膜层上的钨膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化硅膜层，并在难熔金属氮化硅膜层上沉积钨膜层。

公开(公告)号：US20140001576A1

公开(公告)日：2014-01-02

申请号：US13922063

申请日：2013-06-19

Applicant: APPLIED MATERIALS, INC.

Inventor： Srinivas GANDIKOTA ,  Zhendong LIU ,  Jianxin LEI ,  Rajkumar JAKKARAJU

IPC: H01L21/768 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/40114 ,  H01L21/28061 ,  H01L21/285 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/76889 ,  H01L27/10873 ,  H01L29/4941 ,  H01L29/66477 ,  H01L29/78

Abstract: Semiconductor devices, methods and apparatus for forming the same are provided. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal silicon nitride film layer on the conductive film layer, and a tungsten film layer on the refractory metal silicon nitride film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal silicon nitride film layer on the conductive film layer and depositing a tungsten film layer on the refractory metal silicon nitride film layer.

Abstract translation: 提供了用于形成半导体器件的方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化硅膜层和难熔金属氮化硅膜层上的钨膜层。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化硅膜层，并在难熔金属氮化硅膜层上沉积钨膜层。

公开(公告)号：US20150114827A1

公开(公告)日：2015-04-30

申请号：US14062610

申请日：2013-10-24

Applicant: Applied Materials, Inc.

Inventor： Yong CAO ,  Tingjun XU ,  Rajkumar JAKKARAJU ,  Rongjun WANG

IPC: H01L21/02 ,  C23C14/34

CPC classification number: H01L21/02266 ,  C23C14/0036 ,  C23C14/0676 ,  H01L21/02178 ,  H01L21/31111

Abstract: Methods for forming a metal dielectric etching stop layer onto a substrate with good etching selectivity and low wet etching rate. In one embodiment, a method of sputter depositing a metal dielectric etching stop layer on the substrate includes transferring a substrate in a processing chamber, supplying a gas mixture including at least N2 gas into the processing chamber, applying a RF power to form a plasma from the gas mixture to sputter source material from a target disposed in the processing chamber, maintaining a substrate temperature less than about 320 degrees Celsius, and depositing a metal dielectric etching stop layer onto the substrate from the sputtered source material.

Abstract translation: 在具有良好蚀刻选择性和低湿蚀刻速率的基板上形成金属电介质蚀刻停止层的方法。 在一个实施例中，在衬底上溅射沉积金属电介质蚀刻停止层的方法包括在处理室中转移衬底，将至少包括N 2气体的气体混合物供应到处理室中，施加RF功率以形成等离子体 所述气体混合物从设置在所述处理室中的靶溅射源材料，保持低于约320摄氏度的衬底温度，以及从所述溅射源材料在所述衬底上沉积金属电介质蚀刻停止层。