公开(公告)号：US10303480B2

公开(公告)日：2019-05-28

申请号：US14067564

申请日：2013-10-30

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： David A Kaplan ,  Daniel Hopper ,  John M. King ,  Jeff Rupley

IPC: G06F9/38 ,  G06F12/0875

Abstract: Embodiments herein provide for improved store-to-load-forwarding (STLF) logic and linear aliasing effect reduction logic. In one embodiment, a load instruction to be executed is selected. Whether a first linear address associated with said load instruction matches a linear address of a store instruction of a plurality of store instructions in a queue is determined. Data associated with said store instruction for executing said load instruction is forwarded, in response to determining that the first linear address matches the linear address of the store instruction.

公开(公告)号：US20140310506A1

公开(公告)日：2014-10-16

申请号：US13861083

申请日：2013-04-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： David A Kaplan ,  Daniel Hopper ,  Tarun Nakra

IPC: G06F9/30

CPC classification number: G06F9/30043 ,  G06F9/3826 ,  G06F9/3834 ,  G06F9/3838

Abstract: The present invention provides a method and apparatus for allocating store queue entries to store instructions for early store-to-load forwarding. Some embodiments of the method include allocating an entry in a store queue to a store instruction in response to the store instruction being dispatched and prior to receiving a translation of a virtual address to a physical address associated with the store instruction. The entry includes storage for data to be written to the physical address by the store instruction.

Abstract translation: 本发明提供了一种用于分配存储队列条目以存储用于早期存储到负载转发的指令的方法和装置。 该方法的一些实施例包括响应于调度的存储指令以及在将虚拟地址转换为与存储指令相关联的物理地址之前，将存储队列中的条目分配到存储指令到存储指令。 该条目包括通过存储指令写入物理地址的数据的存储。

公开(公告)号：US09335999B2

公开(公告)日：2016-05-10

申请号：US13861083

申请日：2013-04-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： David A Kaplan ,  Daniel Hopper ,  Tarun Nakra

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30043 ,  G06F9/3826 ,  G06F9/3834 ,  G06F9/3838

Abstract: The present invention provides a method and apparatus for allocating store queue entries to store instructions for early store-to-load forwarding. Some embodiments of the method include allocating an entry in a store queue to a store instruction in response to the store instruction being dispatched and prior to receiving a translation of a virtual address to a physical address associated with the store instruction. The entry includes storage for data to be written to the physical address by the store instruction.

Abstract translation: 本发明提供了一种用于分配存储队列条目以存储用于早期存储到负载转发的指令的方法和装置。 该方法的一些实施例包括响应于调度的存储指令以及在将虚拟地址转换为与存储指令相关联的物理地址之前，将存储队列中的条目分配到存储指令到存储指令。 该条目包括通过存储指令写入物理地址的数据的存储。

公开(公告)号：US20150121010A1

公开(公告)日：2015-04-30

申请号：US14067564

申请日：2013-10-30

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： David A Kaplan ,  Daniel Hopper ,  John M. King ,  Jeff Rupley

IPC: G06F9/30 ,  G06F12/08

CPC classification number: G06F12/0875 ,  G06F9/3826 ,  G06F9/3834 ,  Y02D10/13

Abstract: Embodiments herein provide for improved store-to-load-forwarding (STLF) logic and linear aliasing effect reduction logic. In one embodiment, a load instruction to be executed is selected. Whether a first linear address associated with said load instruction matches a linear address of a store instruction of a plurality of store instructions in a queue is determined. Data associated with said store instruction for executing said load instruction is forwarded, in response to determining that the first linear address matches the linear address of the store instruction.

Abstract translation: 这里的实施例提供了改进的存储到负载转发（STLF）逻辑和线性混叠效应降低逻辑。 在一个实施例中，选择要执行的加载指令。 确定与所述加载指令相关联的第一线性地址是否与队列中的多个存储指令的存储指令的线性地址匹配。 响应于确定第一线性地址与存储指令的线性地址匹配，转发与用于执行所述加载指令的所述存储指令相关联的数据。