Abstract:
For each current image output from a pixel matrix, the digital words relative to at least one masked line of the matrix are processed to generate a current correction digital code. From this code, a black level compensation signal is generated and applied as an offset control on pixel signal amplification. If the current correct digital code does not differ from the code calculated for a previous image output by a predetermined amount, then the code for the previous image is instead used to generate the black level compensation signal.
Abstract:
A device for correcting the reset noise and/or the fixed pattern noise of an active pixel comprising a photosensitive element, the device comprising a transmission circuit connecting the photosensitive element to a correction node and operating with a first or a second transmission gain; a circuit for providing a correction voltage equal to the sum of a constant voltage and of the noise multiplied by an amplification gain equal to the inverse of the difference between the first and second transmission gains; and a correction circuit capable of bringing the correction node from the constant voltage to the correction voltage, the transmission circuit having the first transmission gain, and of bringing the correction node to the constant voltage, the transmission circuit having the second transmission gain.
Abstract:
A device for correcting the reset noise and/or the fixed pattern noise of an active pixel comprising a photosensitive element, the device comprising a transmission circuit connecting the photosensitive element to a correction node and operating with a first or a second transmission gain; a circuit for providing a correction voltage equal to the sum of a constant voltage and of the noise multiplied by an amplification gain equal to the inverse of the difference between the first and second transmission gains; and a correction circuit capable of bringing the correction node from the constant voltage to the correction voltage, the transmission circuit having the first transmission gain, and of bringing the correction node to the constant voltage, the transmission circuit having the second transmission gain.
Abstract:
For each current image output from a pixel matrix, the digital words relative to at least one masked line of the matrix are processed to generate a current correction digital code. From this code, a black level compensation signal is generated and applied as an offset control on pixel signal amplification. If the current correct digital code does not differ from the code calculated for a previous image output by a predetermined amount, then the code for the previous image is instead used to generate the black level compensation signal.
Abstract:
A chainable adder receives bits (A, B, C) to give complementary sum outputs (SO, SO*) and carry outputs (CO, CO*). A first stage has differential pairs (P1, P2, P3) receiving bits (A, B, C), respectively, and complements (A*, B*, C*), respectively. The pairs have common output arms and are powered by an identical current (I). First and second output arms include resistors (R1, R2, R3) and (R4, R5, R6), respectively, connected-in-series to a reference potential (M). The resistors define intermediate nodes (A1, A2, A3) in the first arm, (B1, B2, B3) in the second arm. Carry outputs are taken at nodes (A2, B2). A second stage has differential pairs (P4, P5, P6) whose inputs are connected to nodes (A1, B3) for pair (P4), (A2, B2) for pair (P5), and (A3, B1) for pair (P6). Pairs (P4, P6) each have a common arm with the pair (P5) and a non-common arm. The sum outputs are constituted by a combination, according to an “OR” function, of logic states on the non-common arm of one of pairs (P4, P6) and on the common arm of another of pairs (P4, P6).
Abstract:
A method of analog-to-digital conversion over n bits of an analog signal, including the steps of: comparing the amplitude of the analog signal with a threshold representing the amplitude of the full-scale analog signal divided by 2k, where k is an integer smaller than n; performing an analog-to-digital conversion of the analog signal over n−k bits to obtain the n−k most significant bits of a binary word over n bits if the result of the comparison step indicates that the amplitude of the input signal is greater than the threshold, and the n−k least significant bits of this binary word otherwise. An analog-to-digital converter and its application to image sensors.
Abstract:
A method of analog-to-digital conversion over n bits of an analog signal, including the steps of: comparing the amplitude of the analog signal with a threshold representing the amplitude of the full-scale analog signal divided by 2k, where k is an integer smaller than n; performing an analog-to-digital conversion of the analog signal over n-k bits to obtain the n-k most significant bits of a binary word over n bits if the result of the comparison step indicates that the amplitude of the input signal is greater than the threshold, and the n-k least significant bits of this binary word otherwise. An analog-to-digital converter and its application to image sensors.
Abstract:
A CMOS active pixel for image sensors has a photosensitive element, a capacitive feedback element with a capacitance CF, and four transistors, namely a first transistor, two reset transistors and a transistor for the selection of the pixel. These transistors are laid out and controlled in such a way that the first transistor is mounted as an amplifier during the pixel reset phase and as a follower during the read phase.
Abstract:
The proposed sample-and-hold device using a complementary bipolar technology comprises a follower input stage having an input receiving a voltage Vin to be sampled, at least one sampling circuit having a switching stage to be placed either in a first state called a “follower” state where its output follows the potential at its signal input or in a second state called an “isolated” state where its output is isolated from it signal input, the output of the switching stage being connected to the base of a first follower transistor whose emitter is connected to a terminal of an output sampling capacitor, the sampling circuit furthermore comprising a second transistor, having its emitter supplied by a current source and having its base connected to a potential copying that of the terminal of the output sampling capacitor, and a third transistor controlled by the digital command so as to be crossed by a current when the switching stage is in the >, and so as to be off when the switching stage is in the > state, the third transistor having its emitter connected to the base of the first transistor and its base connected to the emitter of the second transistor. Application to analog-digital converters, analog signal processing systems.
Abstract:
An image sensor includes an active pixel, an amplifier stage, and a voltage-limiting stage. The active pixel is configured to generate an information signal. The amplifier stage is coupled to the active pixel and configured to amplify the information signal. The voltage-limiting stage is coupled to the amplifier stage and includes a current shunting device and a gain device. The current shunting device has a first terminal connected to an output of the amplifier stage, a second terminal connected to a reference voltage node, and a control terminal. The gain device is connected to the control terminal of the current shunting device and configured to decrease the voltage span required to cause the current shunting device to enter into a current shunting mode.