Invention Grant
- Patent Title: Integrated circuit fabrication with boron etch-stop layer
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Application No.: US15157868Application Date: 2016-05-18
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Publication No.: US09842913B1Publication Date: 2017-12-12
- Inventor: Chengwen Pei , Xusheng Wu , Ziyan Xu
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Yuanmin Cai
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L29/66 ; H01L29/78 ; H01L21/285 ; H01L21/22 ; H01L21/225 ; H01L21/311 ; H01L29/207

Abstract:
Aspects of the present disclosure include fabricating integrated circuit (IC) structures using a boron etch-stop layer, and IC structures with a boron-rich region therein. Methods of forming an IC structure according to the present disclosure can include: growing a conductive epitaxial layer on an upper surface of a semiconductor element; forming a boron etch-stop layer directly on an upper surface of the conductive epitaxial layer; forming an insulator on the boron etch-stop layer; forming an opening within the insulator to expose an upper surface of the boron etch-stop layer; annealing the boron etch-stop layer to drive boron into the conductive epitaxial layer, such that the boron etch-stop layer becomes a boron-rich region; and forming a contact to the boron-rich region within the opening, such that the contact is electrically connected to the semiconductor element through at least the conductive epitaxial layer.
Public/Granted literature
- US20170338329A1 INTEGRATED CIRCUIT FABRICATION WITH BORON ETCH-STOP LAYER Public/Granted day:2017-11-23
Information query
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