A semiconductor structure includes a die, a molding interfacing with the die along a first direction, wherein a coefficient of thermal expansion (CTE) mismatch is between the molding and the die, a via extending within and through the molding, an elongated member extending within the molding and at least partially along the first direction, a conductive trace over the elongated member and the die, and a dielectric between the elongated member and the conductive trace, wherein the elongated member is proximal to the die than the via.