A semiconductor device and method are provided which utilizes a single mask to form openings for both a through substrate via as well as for a through dielectric via. In an embodiment a contact etch stop layer is deposited over and between a first semiconductor device and a second semiconductor device. A dielectric material is deposited over the contact etch stop layer between the first semiconductor device and the second semiconductor device. The different materials of the contact etch stop layer and the dielectric material is utilized such that a single mask may be used to form a through substrate via through the first semiconductor device and also to form a through dielectric via through the dielectric material.