发明授权
- 专利标题: Method for manufacturing semiconductor device and semiconductor device
- 专利标题(中): 半导体器件和半导体器件的制造方法
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申请号: US14454071申请日: 2014-08-07
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公开(公告)号: US09536994B2公开(公告)日: 2017-01-03
- 发明人: Toshihiko Saito , Atsuo Isobe , Kazuya Hanaoka , Sho Nagamatsu
- 申请人: Semiconductor Energy Laboratory Co., Ltd.
- 申请人地址: JP Kanagawa-ken
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Kanagawa-ken
- 代理机构: Robinson Intellectual Property Law Office
- 代理商 Eric J. Robinson
- 优先权: JP2011-208240 20110923; JP2011-225900 20111013
- 主分类号: H01L29/66
- IPC分类号: H01L29/66 ; H01L29/786 ; H01L27/12 ; H01L27/146 ; H01L29/04 ; H01L29/78 ; H01L21/02 ; H01L21/44 ; H01L21/463 ; H01L21/465
摘要:
A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.
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