- 专利标题: Boolean logic in a state machine lattice
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申请号: US14832543申请日: 2015-08-21
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公开(公告)号: US09509312B2公开(公告)日: 2016-11-29
- 发明人: Harold B Noyes , David R. Brown , Paul Glendenning , Irene Junjuan Xu
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Fletcher Yoder, P.C.
- 主分类号: H03K19/177
- IPC分类号: H03K19/177 ; H03K19/20 ; G05B19/045 ; G06F9/44 ; G06F17/50 ; H03K19/0175 ; G06F7/00
摘要:
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.
公开/授权文献
- US20150365091A1 BOOLEAN LOGIC IN A STATE MACHINE LATTICE 公开/授权日:2015-12-17
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