发明授权
US09449656B2 Memory with bit cell header transistor 有权
具有位单元头晶体管的存储器

Memory with bit cell header transistor
摘要:
A memory includes a plurality of bit cells. Each bit cell includes a bit line and a storage cell coupled to the bit line. A header PMOS transistor is coupled to the storage cell in each bit cell. The header PMOS transistor is at least partially turned off during a write operation by a header control signal.
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