发明授权
- 专利标题： Methods for integrated circuit design and fabrication
- 专利标题（中）： 集成电路设计和制造方法
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申请号： US14262432申请日： 2014-04-25
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公开(公告)号： US09362119B2公开(公告)日： 2016-06-07
- 发明人: Tsong-Hua Ou , Ken-Hsien Hsieh , Shih-Ming Chang , Wen-Chun Huang , Chih-Ming Lai , Ru-Gun Liu , Tsai-Sheng Gau
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Haynes and Boone, LLP
- 主分类号： H01L21/311
- IPC分类号： H01L21/311 ; H01L21/027 ; H01L21/321
摘要：
The present disclosure provides a method of patterning a target material layer over a semiconductor substrate. The method includes steps of: forming a plurality of first features over the target material layer using a first sub-layout, with each first feature having sidewalls; forming a plurality of spacer features, with each spacer feature conforming to the sidewalls of one of the first features and having a spacer width; and forming a plurality of second features over the target material layer using a second sub-layout. The method further includes steps of removing the plurality of spacer features from around each first feature and patterning the target material layer using the plurality of first features and the plurality of second features. Other methods and associated patterned semiconductor wafers are also provided herein.
公开/授权文献
- US20150311063A1 Methods for Integrated Circuit Design and Fabrication 公开/授权日：2015-10-29
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