- 专利标题: Vertical gallium nitride JFET with gate and source electrodes on regrown gate
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申请号: US14606822申请日: 2015-01-27
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公开(公告)号: US09318619B2公开(公告)日: 2016-04-19
- 发明人: Donald R. Disney , Hui Nie , Isik C. Kizilyalli , Richard J. Brown
- 申请人: Avogy, Inc.
- 申请人地址: US CA San Jose
- 专利权人: Avogy, Inc.
- 当前专利权人: Avogy, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Kilpatrick Townsend & Stockton LLP
- 主分类号: H01L29/808
- IPC分类号: H01L29/808 ; H01L29/70 ; H01L29/40 ; H01L29/66 ; H01L29/06 ; H01L29/20
摘要:
A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.
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