Invention Grant
US09312017B2 Storage in charge-trap memory structures using additional electrically-charged regions
有权
使用额外的带电区域存储在电荷陷阱存储器结构中
- Patent Title: Storage in charge-trap memory structures using additional electrically-charged regions
- Patent Title (中): 使用额外的带电区域存储在电荷陷阱存储器结构中
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Application No.: US14457380Application Date: 2014-08-12
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Publication No.: US09312017B2Publication Date: 2016-04-12
- Inventor: Arik Rizel , Avraham Poza Meir , Yael Shur , Eyal Gurgi , Barak Baum
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G11C16/26
- IPC: G11C16/26 ; G11C16/10 ; G11C11/56 ; G11C16/04 ; H01L29/423 ; H01L27/115
Abstract:
A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.
Public/Granted literature
- US20150200016A1 STORAGE IN CHARGE-TRAP MEMORY STRUCTURES USING ADDITIONAL ELECTRICALLY-CHARGED REGIONS Public/Granted day:2015-07-16
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