Invention Grant
- Patent Title: Integrated circuit packaging system with planarity control and method of manufacture thereof
- Patent Title (中): 具有平面度控制的集成电路封装系统及其制造方法
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Application No.: US13526802Application Date: 2012-06-19
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Publication No.: US09293351B2Publication Date: 2016-03-22
- Inventor: Byung Tai Do , Arnel Senosa Trasporto , Linda Pei Ee Chua , Emmanuel Espiritu
- Applicant: Byung Tai Do , Arnel Senosa Trasporto , Linda Pei Ee Chua , Emmanuel Espiritu
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/56 ; H01L23/495

Abstract:
A method of manufacture of an integrated circuit packaging system includes: providing a leadframe having a partially removed portion including: a conductive pattern having a lower surface on a top frame surface of the leadframe, a contact protrusion and a support lead on the lower surface of the conductive pattern, the support lead for supporting the partially removed portion of the leadframe during an encapsulation process, and a contact pad on a bottom surface of the contact protrusion; mounting an integrated circuit die above the conductive pattern; applying an encapsulation on the integrated circuit die and the conductive pattern, the lower surface of the conductive pattern exposed from the encapsulation; and removing at least a portion of the leadframe to form a contact lead and expose a bottom surface of the encapsulation.
Public/Granted literature
- US20130099367A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLANARITY CONTROL AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2013-04-25
Information query
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