Invention Grant
US09281377B2 Semiconductor device having silicide on gate sidewalls in isolation regions
有权
在隔离区域的栅极侧壁上具有硅化物的半导体器件
- Patent Title: Semiconductor device having silicide on gate sidewalls in isolation regions
- Patent Title (中): 在隔离区域的栅极侧壁上具有硅化物的半导体器件
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Application No.: US14535851Application Date: 2014-11-07
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Publication No.: US09281377B2Publication Date: 2016-03-08
- Inventor: Hoon Lim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Onello & Mello, LLP
- Priority: KR10-2009-0019943 20090309
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/28 ; H01L29/423 ; H01L27/088 ; H01L29/06 ; H01L29/49 ; H01L29/78

Abstract:
Provided are a semiconductor device and a method of fabricating the same. According to the semiconductor device, a silicide layer is formed on at least a part of both sidewalls of a gate pattern on a device isolation layer, thereby reducing resistance of the gate pattern. This makes an operation speed of the device rapid. According to the method of the semiconductor device, a sidewall spacer pattern is formed on at least a part of both sidewalls of the gate pattern in following salicide process by entirely or partially removing remaining portions of the sidewall spacer except for portions which are used as an ion implantation mask to form source/drain regions. This can reduce resistance of the gate pattern, thereby fabricating a semiconductor device with a rapid operation speed.
Public/Granted literature
- US20150061039A1 SEMICONDUCTOR DEVICE HAVING SILICIDE ON GATE SIDEWALLS IN ISOLATION REGIONS Public/Granted day:2015-03-05
Information query
IPC分类: