发明授权
- 专利标题: Combination ESD protection circuits and methods
- 专利标题(中): 组合式ESD保护电路及方法
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申请号: US14109080申请日: 2013-12-17
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公开(公告)号: US09209620B2公开(公告)日: 2015-12-08
- 发明人: Xiaofeng Fan , Michael D. Chaine
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Dorsey & Whitney LLP
- 主分类号: H02H9/00
- IPC分类号: H02H9/00 ; H02H9/04 ; H01L27/06 ; H01L27/02 ; H01L27/08
摘要:
Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an example method, a thyristor is triggered to conduct current from a signal node to a reference voltage node using leakage currents provided by a transistor formed in a semiconductor doped well shared with the base of the thyristor. The leakage currents are responsive to a noise event (e.g., electrostatic discharge (ESD) event) at the signal node, and increase the voltage of the semiconductor doped well to forward bias the base and the collector of the thyristor. The triggered thyristor conducts the current resulting from the ESD event to the reference voltage node.
公开/授权文献
- US20140104733A1 COMBINATION ESD PROTECTION CIRCUITS AND METHODS 公开/授权日:2014-04-17
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