Invention Grant
- Patent Title: Semiconductor component having a second passivation layer having a first opening exposing a bond pad and a plurality of second openings exposing a top surface of an underlying first passivation layer
- Patent Title (中): 具有第二钝化层的半导体部件具有暴露接合焊盘的第一开口和暴露下面的第一钝化层的顶表面的多个第二开口
-
Application No.: US12909458Application Date: 2010-10-21
-
Publication No.: US09105588B2Publication Date: 2015-08-11
- Inventor: Ying-Ju Chen , Hsien-Wei Chen
- Applicant: Ying-Ju Chen , Hsien-Wei Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/31 ; H01L23/00 ; H01L21/3205

Abstract:
A conductive feature on a semiconductor component is disclosed. A first passivation layer is formed over a substrate. A bond pad is formed over the first passivation layer. A second passivation layer overlies the first passivation layer and the bond pad. The second passivation layer has a first opening overlying the bond pad and a plurality of second openings exposing a top surface of the first passivation layer. A buffer layer overlies the second passivation layer and fills the plurality of second openings. The buffer layer has a third opening overlapping the first opening and together exposes a portion the bond pad. The combined first opening and third opening has sidewalls. An under bump metallurgy (UBM) layer overlies the sidewalls of the combined first opening and third opening, and contacts the exposed portion of the bond pad. A conductive feature overlies the UBM layer.
Public/Granted literature
- US20120098121A1 CONDUCTIVE FEATURE FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE Public/Granted day:2012-04-26
Information query
IPC分类: