Invention Grant
US09076556B2 Memory with bit line current injection 有权
内存带位线电流注入

Memory with bit line current injection
Abstract:
Embodiments of a memory are disclosed that may allow for the detection of weak data storage cells or may allow operation of data storage cells under conditions that may represent the effects of transistor ageing. The memory may include data storage cells, a column multiplexer, a sense amplifier, and a current injector. The current injector may be configured to generate multiple current levels and may be operable to controllably select one of the current levels to either source current to or sink current from the input of the sense amplifier.
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