Invention Grant
- Patent Title: Semiconductor device with a common back gate isolation region and method for manufacturing the same
- Patent Title (中): 具有公共背栅隔离区的半导体器件及其制造方法
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Application No.: US13510807Application Date: 2011-11-18
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Publication No.: US09054221B2Publication Date: 2015-06-09
- Inventor: Huilong Zhu , Qingqing Liang , Zhijiong Luo , Haizhou Yin
- Applicant: Huilong Zhu , Qingqing Liang , Zhijiong Luo , Haizhou Yin
- Applicant Address: CN Beijing
- Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee Address: CN Beijing
- Agency: Kinney & Lange, P.A.
- Priority: CN201110254340 20110831
- International Application: PCT/CN2011/082396 WO 20111118
- International Announcement: WO2013/029308 WO 20130307
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/336 ; H01L21/84 ; H01L27/12

Abstract:
The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device comprises: an SOI wafer comprising a semiconductor substrate, a buried insulation layer, and a semiconductor layer, wherein the buried insulation layer is disposed on the semiconductor substrate, and the semiconductor layer is disposed on the buried insulation layer; a plurality of MOSFETs being formed adjacently to each other in the SOI wafer, wherein each of the MOSFETs comprises a respective backgate being formed in the semiconductor substrate; and a plurality of shallow trench isolations, each of which being formed between respective adjacent MOSFETs to isolate the respective adjacent MOSFETs from each other, wherein the respective adjacent MOSFETs share a common backgate isolation region under and in direct contact with the respective backgate in the semiconductor substrate, and a PNP junction or an NPN junction is formed by the common backgate isolation region and the respective backgate of the respective adjacent MOSFETs. According to the present disclosure, respective backgates of two adjacent MOSFETs are isolated from each other by the shallow trench isolation. Furthermore, the two adjacent MOSFETs are also isolated from each other by the PNP or NPN junction formed by the respective backgates of the two adjacent MOSFETs and the common backgate isolation. As a result, this device structure has a better insulation effect over the prior art MOSFET and it greatly reduces the possibility of breakthrough.
Public/Granted literature
- US20130049117A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2013-02-28
Information query
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