发明授权
US09032277B1 Parallel low and asymmetric rate Reed Solomon coding 有权
并行低和非对称速率里德所罗门编码

Parallel low and asymmetric rate Reed Solomon coding
摘要:
In an arrangement of the disclosed systems, devices, and methods, a codeword encoded with a first number of check symbols is received and asymmetrically processed according to a second number of check symbols, where the second number of check symbols is less than the first number of check symbols, to produce an error locator polynomial and an error evaluator polynomial. A derivative of the error locator polynomial is produced by outputting a first polynomial term and a second polynomial term, wherein the second polynomial term is a constant. The derivative of the error locator polynomial is produced using a variable finite-field multiplier and without use of a divider.
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