Invention Grant
US08970043B2 Bonded stacked wafers and methods of electroplating bonded stacked wafers
有权
粘合的堆叠晶片和电镀粘合堆叠晶片的方法
- Patent Title: Bonded stacked wafers and methods of electroplating bonded stacked wafers
- Patent Title (中): 粘合的堆叠晶片和电镀粘合堆叠晶片的方法
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Application No.: US13018534Application Date: 2011-02-01
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Publication No.: US08970043B2Publication Date: 2015-03-03
- Inventor: Quanbo Zou , Uppili Sridhar , Amit S. Kelkar , Xuejun Ying
- Applicant: Quanbo Zou , Uppili Sridhar , Amit S. Kelkar , Xuejun Ying
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/48 ; H01L23/52 ; H01L29/40 ; C25D17/00 ; B81C3/00 ; C25D7/12 ; H01L25/00 ; H01L23/00
Abstract:
A wafer structure includes a first wafer stack and a first bonding layer disposed on the first wafer stack. The wafer structure further includes a second wafer stack that includes a first surface and a second surface opposing the first surface. A second bonding layer is disposed on the second surface and is in contact with the first bonding layer. The second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer. A seed layer is disposed on the first surface and is in contact with the TSVs.
Public/Granted literature
- US20120193808A1 BONDED STACKED WAFERS AND METHODS OF ELECTROPLATING BONDED STACKED WAFERS Public/Granted day:2012-08-02
Information query
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