The substrate 20 of the present invention includes pixel electrodes 25 formed in an area demarcated by a plurality of gate wiring lines 26 and source wiring lines 27 that intersect each other, and capacitance wiring lines 126 that are arranged in parallel with the gate wiring lines 26 and that form a capacitance with the pixel electrodes 25. The capacitance wiring lines 126 are arranged overlapping outer edges 125 and 125 of the adjacent pixel electrodes 25 and 25, and the following are formed on the capacitance wiring line 126: a first insulating film that covers the capacitance wiring line 126; a linear height-increasing part 30 formed on the first insulating film; and a second insulating film that covers the height-increasing part 30 and that includes a protruding band part 129 rising along the height-increasing part 30. The pixel electrodes 25 are above the second insulating film and are formed so the outer edges 125 ride up on the protruding band part 129.