A semiconductor device is provided with a lower-layer circuit including a transistor formed over a semiconductor substrate, and a memory cell array formed in an interconnection layer above the semiconductor substrate. Respective memory cells of the memory cell array are provided with a variable resistor element formed in the interconnection layer serving as a memory element. The memory cell array includes a first region directly underneath the memory cells, the first region being a region where a via for electrical coupling with the memory cell is not formed. The lower-layer circuit is disposed in such a way as to overlap at least a part of the first region.